EZR32WG330 Datasheet, PDF (79/87 Pages) Silicon Laboratories – Building and home automation

5.6 QFN64 Package
EZR32WG330 Data Sheet
Pinout and Package
Figure 5.3. QFN64
Note:
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. Dimensioning and Tolerancing per ANSI Y14.5M-1994.
3. This drawing conforms to JEDEC outline MO-220 except for custom features D2, E2, L, Z, and Y which are toleranced per supplier
designation.
4. Recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small Body Components.
Table 5.4. QFN64 (Dimensions in mm)
Symbol A A1 A3 b D/E
Min
Nom
Max
0.80 0.00
0.18 8.90
0.85
0.02
0.20
REF
0.25
9.00
0.90 0.05
0.30 9.10
D2/E2
6.80
6.90
7.00
e
L
R
K aaa bbb ccc ddd eee fff
0.30 0.09 0.20
0.50
BSC
0.40
─
─ 0.15 0.10 0.10 0.05 0.08 0.10
0.50 0.14 ─
The QFN64 Package uses Matte Tin plated leadframe. All EZR32 packages are RoHS compliant and free of Bromine (Br) and Antimo-
ny (Sb).
For additional Quality and Environmental information, please see: http://www.silabs.com/support/quality/pages/default.aspx
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