EZR32WG330 Datasheet, PDF (10/87 Pages) Silicon Laboratories – Building and home automation

EZR32WG330 Data Sheet
System Overview
3.2 Configuration Summary
The features of the EZR32WG330 are a subset of the feature set described in the EZR32WGReference Manual. The table below de-
scribes device specific implementation of the features.
Table 3.2. Configuration Summary
Module
Cortex-M4
DBG
MSC
DMA
RMU
EMU
CMU
WDOG
PRS
USB
I2C0
I2C1
USARTRF0
USART1
USART2
UART0
UART1
LEUART0
LEUART1
TIMER0
TIMER1
TIMER2
TIMER3
RTC
BURTC
LETIMER0
PCNT0
PCNT1
PCNT2
ACMP0
ACMP1
VCMP
Configuration
Full configuration
Full configuration
Full configuration
Full configuration
Full configuration
Full configuration
Full configuration
Full configuration
Full configuration
Full configuration
Full configuration
Full configuration
Full configuration with IrDA
Full configuration with I2S
Full configuration with I2S
Full configuration
Full configuration
Full configuration
Full configuration
Full configuration with DTI
Full configuration
Full configuration
Full configuration
Full configuration
Full configuration
Full configuration
Full configuration, 16-bit count register
Full configuration, 8-bit count register
Full configuration, 8-bit count register
Full configuration
Full configuration
Full configuration
Pin Connections
NA
DBG_SWCLK, DBG_SWDIO, DBG_SWO
NA
NA
NA
NA
CMU_OUT0, CMU_OUT1
NA
NA
USB_VBUS, USB_VBUSEN, USB_VREGI,
USB_VREGO, USB_DM, USB_DMPU,
USB_DP, USB_ID
I2C0_SDA, I2C0_SCL
I2C1_SDA, I2C1_SCL
US0_TX, US0_RX, US0_CLK, US0_CS
US1_TX, US1_RX, US1_CLK, US1_CS
US2_TX, US2_RX, US2_CLK, US2_CS
U0_TX, U0_RX
U1_TX, U1_RX
LEU0_TX, LEU0_RX
LEU1_TX, LEU1_RX
TIM0_CC[2:0], TIM0_CDTI[2:0]
TIM1_CC[2:0]
TIM2_CC[2:0]
TIM3_CC[2:0]
NA
NA
LET0_O[1:0]
PCNT0_S[1:0]
PCNT1_S[1:0]
PCNT2_S[1:0]
ACMP0_CH[7:0], ACMP0_O
ACMP1_CH[7:0], ACMP1_O
NA
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