|
SI5320 Datasheet, PDF (7/34 Pages) List of Unclassifed Manufacturers – SONET/SDH PRECISION CLOCK MULTIPLIER IC | |||
|
◁ |
Si5320
Table 3. AC Characteristics
(VDD33 = 3.3 V ±5%, TA = â20 to 85 °C)
Parameter
Symbol
Test Condition
Min Typ Max Unit
Input Clock Frequency (CLKIN)
FEC[1:0] = 00 (non FEC)
INFRQSEL[2:0] = 001
INFRQSEL[2:0] = 010
INFRQSEL[2:0] = 011
INFRQSEL[2:0] = 100
INFRQSEL[2:0] = 101
INFRQSEL[2:0] = 110
fCLKIN
No FEC Scaling
19.436 â 21.685 MHz
38.872 â 43.369
77.744 â 86.738
155.48 â 173.48
310.97 â 346.95
621.95 â 693.90
Input Clock Frequency (CLKIN)
FEC[1:0] = 01 (forward FEC)
INFRQSEL[2:0] = 001
INFRQSEL[2:0] = 010
INFRQSEL[2:0] = 011
INFRQSEL[2:0] = 100
INFRQSEL[2:0] = 101
INFRQSEL[2:0] = 110
fCLKIN
255/238 FEC Scaling
18.142 â 20.239 MHz
36.284 â 40.478
72.568 â 80.955
145.13 â 161.91
290.27 â 323.82
580.54 â 647.64
Input Clock Frequency (CLKIN)
FEC[1:0] = 10 (reverse FEC)
INFRQSEL[2:0] = 001
INFRQSEL[2:0] = 010
INFRQSEL[2:0] = 011
INFRQSEL[2:0] = 100
INFRQSEL[2:0] = 101
INFRQSEL[2:0] = 110
fCLKIN
238/255 FEC Scaling
20.826 â 23.234 MHz
41.652 â 46.465
83.305 â 92.934
166.61 â 185.87
333.22 â 371.74
666.44 â 743.47
Input Clock Rise Time (CLKIN)
Input Clock Fall Time (CLKIN)
Input Clock Duty Cycle
CLKOUT Frequency Range*
FRQSEL[1:0] = 00 (no output)
FRQSEL[1:0] = 01
FRQSEL[1:0] = 10
FRQSEL[1:0] = 11
CLKOUT Rise Time
tR
tF
CDUTY_IN
Figure 2
Figure 2
â
â
11
ns
â
â
11
ns
40
50
60
%
fO_19
fO_155
fO_622
â
â
â
19.436 â 21.685 MHz
155.48 â 173.48
621.95 â 693.90
tR
Figure 2; single-ended; after â
213 260 ps
3 cm of 50 ï FR4 stripline
CLKOUT Fall Time
tF
Figure 2; single-ended; after â
191 260 ps
3 cm of 50 ï FR4 stripline
Output Clock Duty Cycle
CDUTY_OUT
Differential:
48
â
52
%
(CLKOUT+) â (CLKOUTâ)
RSTN/CAL Pulse Width
tRSTN
20
â
â
ns
*Note: The Si5320 provides a 1/32, 1/16, 1/8, 1/4, 1/2, 1, 2, 4, 8, 16, or 32x clock frequency multiplication function with an
option for additional frequency scaling by a factor of 255/238 or 238/255 for FEC rate compatibility.
Rev. 2.5
7
|
▷ |