SI5320 Datasheet, PDF (12/34 Pages) List of Unclassifed Manufacturers – SONET/SDH PRECISION CLOCK MULTIPLIER IC

Si5320
Table 4. AC Characteristics (PLL Performance Characteristics) (Continued)
(V_DD33 = 3.3 V ±5%, TA = –20 to 85 °C)
Parameter
Symbol
Test Condition
Min Typ Max Unit
Jitter Transfer Bandwidth (see Figure 6)
Wander/Jitter Transfer Peaking
Wander/Jitter at 6400 Hz Bandwidth
(BWSEL[1:0] = 11 and DBLBW = 0)
F_BW
BW = 6400 Hz
— 6400 — Hz
J_P
< 6400 Hz
— 0.05 0.1 dB
Jitter Tolerance (see Figure 7) (1/1 Scaling)
J_TOL(PP)
f = 64 Hz
f = 640 Hz
1000 —
100 —
— ns
— ns
f = 6400 Hz
10 — — ns
CLKOUT RMS Jitter Generation
FEC[1:0] = 00 (1/1 Scaling)
J_GEN(RMS)
12 kHz to 20 MHz
50 kHz to 80 MHz
— 1.0 1.4 ps
— 0.38 0.5 ps
CLKOUT RMS Jitter Generation
J_GEN(RMS)
FEC[1:0] = 01, 10 (255/238, 238/255 scaling)
12 kHz to 20 MHz
50 kHz to 80 MHz
— 0.94 1.4 ps
— 0.41 0.6 ps
CLKOUT Peak-Peak Jitter Generation
FEC[1:0] = 00 (1/1 Scaling)
J_GEN(PP)
12 kHz to 20 MHz
50 kHz to 80 MHz
— 9.4 12.0 ps
— 4.7 5.5 ps
CLKOUT Peak-Peak Jitter Generation
FEC[1:0] = 01, 10 (255/238, 238/255 scaling)
J_GEN(PP)
12 kHz to 20 MHz
50 kHz to 80 MHz
— 8.3 12.0 ps
— 4.6 5.5 ps
Jitter Transfer Bandwidth (see Figure 6)
Wander/Jitter Transfer Peaking
Wander/Jitter at 12800 Hz Bandwidth
(BWSEL[1:0] = 11 and DBLBW = 1)
F_BW
BW = 6400 Hz
— 6400 — Hz
J_P
< 6400 Hz
— 0.05 0.1 dB
Jitter Tolerance (see Figure 7)
f = 128 Hz
500 — — ns
f = 1280 Hz
50 — — ns
f = 12800 Hz
5 — — ns
CLKOUT RMS Jitter Generation
FEC[1:0] = 00 (1/1 Scaling)
J_GEN(RMS)
12 kHz to 20 MHz
50 kHz to 80 MHz
— 0.74 1.0 ps
— 0.30 0.4 ps
CLKOUT Peak-Peak Jitter Generation
FEC[1:0] = 00 (1/1 Scaling)
J_GEN(PP)
12 kHz to 20 MHz
50 kHz to 80 MHz
— 6.9 9.0 ps
— 4.0 5.0 ps
Jitter Transfer Bandwidth (see Figure 6)
F_BW
BW = 12,800 Hz
— 12800 — Hz
Wander/Jitter Transfer Peaking
J_P
< 12,800 Hz
— 0.05 0.1 dB
Notes:
1. Higher PLL bandwidth settings provide smaller clock output wander with temperature gradient.
2. For reliable device operation, temperature gradients should be limited to 10 °C/min.
3. Telcordia GR-1244-CORE requirements specify maximum phase transient slope during clock rearrangement in terms of
nanoseconds per millisecond. The equivalent ps/s unit is used here since the maximum phase transient magnitude for the
Si5320 (tPT_MTIE) never reaches one nanosecond.
12
Rev. 2.5