SI8233 Datasheet, PDF (55/57 Pages) Silicon Laboratories – 0.5 AND 4.0 AMP ISODRIVERS

Si823x
DOCUMENT CHANGE LIST
Revision 0.11 to Revision 0.2
 Updated all specs to reflect latest silicon revision.
 Updated Table 1 on page 6 to include new UVLO
options.
 Updated Table 8 on page 14 to reflect new maximum
package isolation ratings
 Added Figures 34, 35, and 36.
 Updated Ordering Guide to reflect new package
offerings.
 Added "3.7.3. Undervoltage Lockout (UVLO)" on
page 27 to describe UVLO operation.
Revision 0.2 to Revision 0.3
 Moved Sections 2, 3, and 4 to after Section 5.
 Updated Tables 14, 15, and 17.
Removed Si8230, Si8231, and Si8232 from pinout and
from title.
 Updated and added Ordering Guide footnotes.
 Updated UVLO specifications in Table 1 on page 6.
 Added PWD and Output Supply Active Current
specifications in Table 1.
 Updated and added typical operating condition
graphs in "3.1. Typical Operating Characteristics
(0.5 Amp)" on page 17 and "3.2. Typical Operating
Characteristics (4.0 Amp)" on page 19.
Revision 0.3 to Revision 1.0
 Updated Tables 2, 3, 4, and 5.
 Updated “6. Ordering Guide” .
Added 5 V UVLO ordering options
 Added Device Marking sections.
Revision 1.0 to Revision 1.1
 Updated " Features" on page 1.
Updated CMTI specification.
 Updated Table 1 on page 6.
Updated CMTI specification.
 Updated Table 5, “IEC 60747-5-5 Insulation
Characteristics*,” on page 13.
 Updated "4.2. Dual Driver" on page 31.
 Updated "6. Ordering Guide" on page 39.
 Replaced pin descriptions on page 1 with chip
graphics.
Revision 1.1 to Revision 1.2
 Updated "6. Ordering Guide" on page 39.
Updated moisture sensitivity level (MSL) for all package
types.
 Updated Table 8 on page 14.
Added junction temperature spec.
 Updated Table 2 on page 11 with new notes.
 Added Table 17 and pinout.
 Updated Figures 19, 20, 21, and 22 to reflect correct
y-axis scaling.
 Updated Figure 44 on page 31.
 Updated "4.3. Dual Driver with Thermally Enhanced
Package (Si8236)" on page 31.
 Updated "7. Package Outline: 16-Pin Wide Body
SOIC" on page 43.
 Updated Table 19, “Package Diagram Dimensions,”
on page 44.
 Change references to 1.5 kV_RMS rated devices to
1.0 kV_RMS throughout.
 Updated "3.5. Power Dissipation Considerations" on
page 23.
Revision 1.2 to Revision 1.3
 Added Si8237/8 throughout.
 Updated Table 1 on page 6.
 Updated Figure 4 on page 9.
 UpdatedFigure 5 on page 9.
 Added Figure 6 on page 10.
 Updated Table 10 on page 21.
Created Notes 1 and 2.
 Updated "3.8. Programmable Dead Time and
Overlap Protection" on page 28.
Removed references to Figures 26A and 26B.
 Updated Table 18 on page 39.
Added Si8235-BA-C-IS1 ordering part number.
Added table note.
Revision 1.3 to Revision 1.4
 Updated "6. Ordering Guide" on page 39.
Updated “ 3 V VDDI Ordering Options” .
Revision 1.4 to Revision 1.5
 Updated Table 1, input and output supply current.
 Added references to AEC-Q100 qualified
throughout.
 Changed all 60747-5-2 references to 60747-5-5.
 Added references to CQC throughout.
 Updated pin descriptions throughout.
Corrected dead time default to 400 ps from 1 ns.
 Updated Table 18, Ordering Part Numbers.
Removed moisture sensitivity level table notes.
Rev. 1.7
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