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SI4468-7 Datasheet, PDF (5/57 Pages) Silicon Laboratories – Highly configurable packet handler
Si4468/7
Table 2. Synthesizer AC Electrical Characteristics
Parameter
Synthesizer Frequency
Range
Symbol
FSYN
Test Condition
Min Typ Max Unit
850 — 1050 MHz
350 — 525 MHz
284 — 350 MHz
142 — 175 MHz
Synthesizer Frequency
Resolution
FRES-960
FRES-525
850–1050 MHz
420–525 MHz
— 28.6 —
Hz
— 14.3 —
Hz
FRES-420
350–420 MHz
— 11.4 —
Hz
FRES-350
283–350 MHz
— 9.5 —
Hz
FRES-175
142–175 MHz
— 4.7 —
Hz
Synthesizer Settling Time
tLOCK Measured from exiting Ready mode with —
50
—
µs
XOSC running to any frequency.
Including VCO Calibration.
Phase Noise
L(fM)
F = 10 kHz, 169 MHz, High Perf Mode —
F = 100 kHz, 169 MHz, High Perf Mode —
–117 –108 dBc/Hz
–120 –115 dBc/Hz
F = 1 MHz, 169 MHz, High Perf Mode — –138 –135 dBc/Hz
F = 10 MHz, 169 MHz, High Perf Mode — –148 –143 dBc/Hz
F = 10 kHz, 915 MHz, High Perf Mode — –102 –94 dBc/Hz
F = 100 kHz, 915 MHz, High Perf Mode — –105 –97 dBc/Hz
F = 1 MHz, 915 MHz, High Perf Mode — –125 –122 dBc/Hz
F = 10 MHz, 915 MHz, High Perf Mode — –138 –135 dBc/Hz
Note: All minimum and maximum values are guaranteed across the recommended operating conditions of supply voltage and
from –40 to +85 °C unless otherwise stated. All typical values apply at VDD = 3.3 V and 25 °C unless otherwise stated.
Rev 1.0
5