SI53152 Datasheet, PDF (4/22 Pages) Silicon Laboratories – PCI-EXPRESS GEN 1, GEN 2, GEN 3, AND GEN 4 FANOUT BUFFER

Si53152
1. Electrical Specifications
Table 1. DC Electrical Specifications
Parameter
3.3 V Operating Voltage
Symbol
VDD core
Test Condition
3.3 ± 5%
Min
Typ
3.135 3.3
3.3 V Input High Voltage
3.3 V Input Low Voltage
Input High Voltage
Input Low Voltage
Input High Leakage Current
Input Low Leakage Current
3.3 V Output High Voltage
(Single-Ended Outputs)
3.3 V Output Low Voltage
(Single-Ended Outputs)
High-impedance Output
Current
Input Pin Capacitance
Output Pin Capacitance
Pin Inductance
Dynamic Supply Current
V_IH
Control input pins
2.0
—
V_IL
Control input pins
V_SS – 0.3 —
V_IHI2C
SDATA, SCLK
2.2
—
V_ILI2C
SDATA, SCLK
—
—
I_IH
Except internal pull-down
—
—
resistors, 0 < V_IN < V_DD
I_IL
Except internal pull-up resis- –5
—
tors, 0 < V_IN < V_DD
V_OH
I_OH = –1 mA
2.4
—
V_OL
I_OL = 1 mA
—
—
I_OZ
–10
—
C_IN
1.5
—
C_OUT
—
—
L_IN
—
—
I_{DD_3.3V} All outputs enabled. Differ-
—
—
ential clock with 5” traces
and 2 pF load at 100 MHz.
Max Unit
3.465 V
V_DD + 0.3 V
0.8
V
—
V
1.0
V
5
A
—
A
—
V
0.4
V
10
µA
5
pF
6
pF
7
nH
20
mA
4
Rev. 1.1