SI53152 Datasheet, PDF (13/22 Pages) Silicon Laboratories – PCI-EXPRESS GEN 1, GEN 2, GEN 3, AND GEN 4 FANOUT BUFFER

Si53152
Control Register 2. Byte 2
Bit
D7
D6
D5
Name DIFF0_OE DIFF1_OE
Type
R/W
R/W
R/W
Reset settings = 11000000
D4
R/W
Bit
Name
7
DIFF0_OE Output Enable for DIFF0.
0: Output disabled.
1: Output enabled.
6
DIFF1_OE Output Enable for DIFF1
0: Output disabled.
1: Output enabled.
5:0
Reserved
D3
D2
R/W
R/W
Function
D1
R/W
D0
R/W
Control Register 3. Byte 3
Bit
D7
D6
D5
D4
D3
D2
D1
D0
Name
Rev Code[3:0]
Vendor ID[3:0]
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset settings = 00001000
Bit
Name
Function
7:4
Rev Code[3:0] Program Revision Code.
3:0
Vendor ID[3:0] _{Vendor Identification Code.}
Control Register 4. Byte 4
Bit
D7
D6
D5
D4
D3
D2
D1
D0
Name
BC[7:0]
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset settings = 00000110
Bit
Name
7:0
BC[7:0]
Byte Count Register.
Function
Rev. 1.1
13