SI5321 Datasheet, PDF (33/34 Pages) List of Unclassifed Manufacturers – SONET/SDH PRECISION CLOCK MULTIPLIER IC

DOCUMENT CHANGE LIST
Revision 2.0 to Revision 2.1
 Updated Table 3, “AC Characteristics,” on page 7.
 Updated Figure 8, “Recovery from Digital Hold,” on
page 20.
 Updated Figure 12, “63-Ball Plastic Ball Grid Array
(PBGA),” on page 31.
 Updated Table 11, “Package Diagram Dimensions
(mm),” on page 31.
 Added Figure 4, “Typical Si5321 Phase Noise
(CLKIN = 155.52 MHz, CLKOUT = 622.08 MHz, and
Loop BW = 800 Hz),” on page 15.
Revision 2.1 to Revision 2.2
 Updated Table 3, “AC Characteristics,” on page 7.
 Updated Table 11, “Package Diagram Dimensions
(mm),” on page 31.
Revision 2.2 to Revision 2.3
 Updated "5. Package Outline" on page 31.
Revision 2.3 to Revision 2.4
 Device Revision G to H Transition.
 Updated test condition for differential output voltage
swing, input clock frequency, clock output rise/fall
time, and jitter specifications.
 Updated “3. Pin Descriptions: Si5321”.
 Updated "4. Ordering Guide" on page 30.
 Updated "5. Package Outline" on page 31.
 Updated "6. 9x9 mm PBGA Card Layout" on page
32.
Revision 2.4 to Revision 2.5
 Updated Table 6, “Thermal Characteristics,” on
page 15.
Si5321
Rev. 2.5
33