SI823X Datasheet, PDF (31/52 Pages) Silicon Laboratories – 0.5 AND 4.0 AMP ISODRIVERS (2.5 AND 5 KVRMS)

8. Pin Descriptions
Si823x
VIA
VIB
VDDI
GNDI
DISABLE
DT
NC
VDDI
SOIC-16 (Wide)
1
16
2
15
3
14
4
Si8230 ¹³
5
Si8233
12
6
11
7
10
8
9
VDDA
VOA
GNDA
NC
NC
VDDB
VOB
GNDB
SOIC-16 (Narrow)
VIA
VIB
VDDI
GNDI
DISABLE
DT
NC
VDDI
1
16
2
15
3
14
4 _Si8230 ¹³
5 ^Si8233 12
6
11
7
10
8
9
VDDA
VOA
GNDA
NC
NC
VDDB
VOB
GNDB
Table 12. Si8230/3 Two-Input HS/LS Isolated Driver (SOIC-16)
Pin Name
Description
1
VIA Non-inverting logic input terminal for Driver A.
2
VIB Non-inverting logic input terminal for Driver B.
3 VDDI Input-side power supply terminal; connect to a source of 4.5 to 5.5 V.
4 GNDI Input-side ground terminal.
5 DISABLE Device Disable. When high, this input unconditionally drives outputs VOA, VOB LOW. It is
strongly recommended that this input be connected to external logic level to avoid erroneous
operation due to capacitive noise coupling.
6
DT Dead time programming input. The value of the resistor connected from DT to ground sets the
dead time between output transitions of VOA and VOB. Defaults to 1 ns dead time when con-
nected to VDDI or left open (see "5.7.Programmable Dead Time and Overlap Protection" on
page 26).
7
NC No connection.
8 VDDI Input-side power supply terminal; connect to a source of 4.5 to 5.5 V.
9 GNDB Ground terminal for Driver B.
10 VOB Driver B output (low-side driver).
11 VDDB Driver B power supply voltage terminal; connect to a source of 6.5 to 24 V.
12
NC No connection.
13
NC No connection.
14 GNDA Ground terminal for Driver A.
15 VOA Driver A output (high-side driver).
16 VDDA Driver A power supply voltage terminal; connect to a source of 6.5 to 24 V.
Rev. 0.3
31