SI8431BB-C-IS Datasheet, PDF (21/38 Pages) Silicon Laboratories – LOW-POWER TRIPLE-CHANNEL DIGITAL ISOLATOR

Si8430/31/35
Table 13. Enable Input Truth Table¹
P/N
EN1^1,2 EN2^1,2
Operation
Si8430
—
H Outputs B1, B2, B3 are enabled and follow input state.
—
L Outputs B1, B2, B3 are disabled and Logic Low or in high impedance state.³
Si8431
H
X Output A3 enabled and follows input state.
L
X Output A3 disabled and Logic Low or in high impedance state.³
X
H Outputs B1, B2 are enabled and follow input state.
X
L Outputs B1, B2 are disabled and Logic Low or in high impedance state.³
Si8435
—
— Outputs B1, B2, B3 are enabled and follow input state.
Notes:
1. Enable inputs EN1 and EN2 can be used for multiplexing, for clock sync, or other output control. These inputs are
internally pulled-up to local VDD by a 3 µA current source allowing them to be connected to an external logic level (high
or low) or left floating. To minimize noise coupling, do not connect circuit traces to EN1 or EN2 if they are left floating. If
EN1, EN2 are unused, it is recommended they be connected to an external logic level, especially if the Si84xx is
operating in a noisy environment.
2. X = not applicable; H = Logic High; L = Logic Low.
3. When using the enable pin (EN) function, the output pin state is driven to a logic low state when the EN pin is disabled
(EN = 0) in Revision C. Revision D outputs go into a high-impedance state when the EN pin is disabled (EN = 0). See
"3. Errata and Design Migration Guidelines" on page 25 for more details.
Rev. 1.5
21