SI8431BB-C-IS Datasheet, PDF (13/38 Pages) Silicon Laboratories – LOW-POWER TRIPLE-CHANNEL DIGITAL ISOLATOR

Si8430/31/35
Table 5. Electrical Characteristics¹ (Continued)
(V_DD1 = 2.70 V, V_DD2 = 2.70 V, T_A = –40 to 125 ºC; applies to narrow and wide-body SOIC packages)
Parameter
Symbol Test Condition
Min
Typ
Max Unit
10 Mbps Supply Current (All inputs = 5 MHz square wave, CI = 15 pF on all outputs)
Si8430Bx, Si8435Bx
V_DD1
V_DD2
—
—
2.7
3.0
4.1
4.2
mA
Si8431Bx
V_DD1
V_DD2
—
—
3.1
3.2
4.3
4.5
mA
100 Mbps Supply Current (All inputs = 50 MHz square wave, CI = 15 pF on all outputs)
Si8430Bx, Si8435Bx
V_DD1
V_DD2
Si8431Bx
V_DD1
V_DD2
—
—
—
—
Timing Characteristics
2.8
8.0
4.2
10
mA
4.7
6.7
5.9
8.4
mA
Si843xAx
Maximum Data Rate
0
—
1.0 Mbps
Minimum Pulse Width
—
—
250
ns
Propagation Delay
t_PHL, t_PLH See Figure 2
—
—
35
ns
Pulse Width Distortion
|t_PLH - t_PHL|
PWD
See Figure 2
—
Propagation Delay Skew³
t_PSK(P-P)
—
—
25
ns
—
40
ns
Channel-Channel Skew
t_PSK
—
—
35
ns
Notes:
1. Specifications in this table are also valid at VDD1 = 2.6 V and VDD2 = 2.6 V when the operating temperature range is
constrained to T_A = 0 to 85 °C.
2. The nominal output impedance of an isolator driver channel is approximately 85 , ±40%, which is a combination of
the value of the on-chip series termination resistor and channel resistance of the output driver FET. When driving loads
where transmission line effects will be a factor, output pins should be appropriately terminated with controlled
impedance PCB traces.
3. t_PSK(P-P) is the magnitude of the difference in propagation delay times measured between different units operating at
the same supply voltages, load, and ambient temperature.
4. See "3. Errata and Design Migration Guidelines" on page 25 for more details.
5. Start-up time is the time period from the application of power to valid data at the output.
Rev. 1.5
13