SI8431BB-C-IS Datasheet, PDF (12/38 Pages) Silicon Laboratories – LOW-POWER TRIPLE-CHANNEL DIGITAL ISOLATOR

Si8430/31/35
Table 5. Electrical Characteristics¹
(V_DD1 = 2.70 V, V_DD2 = 2.70 V, T_A = –40 to 125 ºC; applies to narrow and wide-body SOIC packages)
Parameter
Symbol Test Condition
Min
Typ
Max Unit
High Level Input Voltage
Low Level Input Voltage
High Level Output Voltage
Low Level Output Voltage
Input Leakage Current
Output Impedance²
Enable Input High Current
Enable Input Low Current
V_IH
2.0
—
V_IL
—
—
V_OH
loh = –4 mA V_DD1,V_DD2 – 0.4 2.3
V_OL
lol = 4 mA
—
0.2
I_L
—
—
Z_O
—
85
I_ENH
V_ENx = V_IH
—
2.0
I_ENL
V_ENx = V_IL
—
2.0
DC Supply Current (All inputs 0 V or at supply)
—
V
0.8
V
—
V
0.4
V
±10
µA
—

—
µA
—
µA
Si8430Ax, Bx and Si8435Bx
V_DD1
V_DD2
V_DD1
V_DD2
All inputs 0 DC
—
All inputs 0 DC
—
All inputs 1 DC
—
All inputs 1 DC
—
1.2
1.8
1.9
4.2
2.9
6.3
mA
1.9
2.9
Si8431Ax, Bx
V_DD1
V_DD2
V_DD1
V_DD2
All inputs 0 DC
—
All inputs 0 DC
—
All inputs 1 DC
—
All inputs 1 DC
—
1.7
2.6
2.0
3.7
3.0
5.6
mA
3.0
4.5
1 Mbps Supply Current (All inputs = 500 kHz square wave, CI = 15 pF on all outputs)
Si8430Ax, Bx and Si8435Bx
V_DD1
V_DD2
—
—
2.7
2.2
4.1
3.3
mA
Si8431Ax, Bx
V_DD1
V_DD2
—
—
2.8
2.7
4.2
4.1
mA
Notes:
1. Specifications in this table are also valid at VDD1 = 2.6 V and VDD2 = 2.6 V when the operating temperature range is
constrained to T_A = 0 to 85 °C.
2. The nominal output impedance of an isolator driver channel is approximately 85 , ±40%, which is a combination of
the value of the on-chip series termination resistor and channel resistance of the output driver FET. When driving loads
where transmission line effects will be a factor, output pins should be appropriately terminated with controlled
impedance PCB traces.
3. t_PSK(P-P) is the magnitude of the difference in propagation delay times measured between different units operating at
the same supply voltages, load, and ambient temperature.
4. See "3. Errata and Design Migration Guidelines" on page 25 for more details.
5. Start-up time is the time period from the application of power to valid data at the output.
12
Rev. 1.5