SI4430-B1 Datasheet, PDF (12/74 Pages) Silicon Laboratories – Si4430/31/32 ISM TRANSCEIVER

Si4430/31/32-B1
Table 6. Digital IO Specifications (SDO, SDI, SCLK, nSEL, and nIRQ)
Parameter
Symbol
Conditions
Min
Typ Max Units
Rise Time
T_RISE 0.1 x V_DD to 0.9 x V_DD, C_L= 5 pF
—
—
8
ns
Fall Time
T_FALL 0.9 x V_DD to 0.1 x V_DD, C_L= 5 pF
—
—
8
ns
Input Capacitance
C_IN
—
—
1
pF
Logic High Level Input Voltage
V_IH
V_DD – 0.6 —
—
V
Logic Low Level Input Voltage
V_IL
— 0.6
V
Input Current
I_IN
0<V_IN< V_DD
–100
— 100 nA
Logic High Level Output
Voltage
V_OH
I_OH<1 mA source, V_DD=1.8 V V_DD – 0.6 —
—
V
Logic Low Level Output Voltage V_OL
I_OL<1 mA sink, V_DD=1.8 V
—
— 0.6
V
Note: All specifications guaranteed by qualification. Qualification test conditions are listed in the "Production Test Conditions"
section on page 14.
Table 7. GPIO Specifications (GPIO_0, GPIO_1, and GPIO_2)
Parameter
Symbol
Conditions
Min
Typ Max Units
Rise Time
T_RISE
0.1 x V_DD to 0.9 x V_DD,
—
—
8
ns
C_L= 10 pF, DRV<1:0>=HH
Fall Time
T_FALL
0.9 x V_DD to 0.1 x V_DD,
—
—
8
ns
C_L= 10 pF, DRV<1:0>=HH
Input Capacitance
C_IN
—
—
1
pF
Logic High Level Input Voltage
V_IH
V_DD – 0.6 —
V
Logic Low Level Input Voltage
V_IL
—
— 0.6
V
Input Current
I_IN
0<V_IN< V_DD
–100
— 100 nA
Input Current If Pullup is Activated I_INP
V_IL=0 V
5
—
25
µA
Maximum Output Current
I_OmaxLL
DRV<1:0>=LL
0.1
0.5 0.8 mA
I_OmaxLH
DRV<1:0>=LH
0.9
2.3 3.5 mA
I_OmaxHL
DRV<1:0>=HL
1.5
3.1 4.8 mA
I_OmaxHH
DRV<1:0>=HH
1.8
3.6 5.4 mA
Logic High Level Output Voltage
V_OH
I_OH< I_Omax source,
V_DD=1.8 V
V_DD – 0.6 —
—
V
Logic Low Level Output Voltage
V_OL
I_OL< I_Omax sink,
V_DD=1.8 V
—
— 0.6
V
Note: All specifications guaranteed by qualification. Qualification test conditions are listed in the "Production Test Conditions"
section on page 14.
12
Rev 1.1