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SI5365 Datasheet, PDF (11/18 Pages) Silicon Laboratories – PIN-PROGRAMMABLE PRECISION CLOCK MULTIPLIER
Si5365
Pin #
80
95
Table 3. Si5365 Pin Descriptions (Continued)
Pin Name I/O Signal Level
Description
SFOUT1 I
SFOUT0
3-Level
Signal Format Select.
Three level inputs that select the output signal format (common mode
voltage and differential swing) for all of the clock outputs and CKOUT5.
SFOUT[1:0]
Signal Format
HH
Reserved
HM
Reserved
HL
CML
MH
LVPECL
MM
Reserved
ML
LVDS
LH
CMOS
LM
Tristate/Sleep
LL
Reserved
82 CKOUT1– O
83 CKOUT1+
85
DBL34 I
87 CKOUT5– O
88 CKOUT5+
92 CKOUT2+ O
93 CKOUT2–
97 CKOUT4– O
98 CKOUT4+
GND PAD GND PAD GND
MULTI
LVCMOS
MULTI
MULTI
MULTI
Supply
Clock Output 1.
Differential output clock with a frequency specified by FRQSEL and
FRQTBL. Output signal format is selected by SFOUT pins. Output is dif-
ferential for LVPECL, LVDS, and CML compatible modes. For CMOS
format, both output pins drive identical single-ended clock outputs.
Output 3 and 4 Disable.
Active high input. When active, entire CKOUT3 and CKOUT4 divider
and output buffer path is powered down. CKOUT3 and CKOUT4 outputs
will be in tristate mode during powerdown.
This pin has a weak pull-down.
Clock Output 5.
Fifth high-speed clock output with a frequency specified by FRQSEL and
FRQTBL. Output signal format is selected by SFOUT pins. Output is dif-
ferential for LVPECL, LVDS, and CML compatible modes. For CMOS
format, both output pins drive identical single-ended clock outputs.
Clock Output 2.
Differential output clock with a frequency specified by FRQSEL and
FRQTBL. Output signal format is selected by SFOUT pins. Output is dif-
ferential for LVPECL, LVDS, and CML compatible modes. For CMOS
format, both output pins drive identical single-ended clock outputs.
Clock Output 4.
Differential output clock with a frequency specified by FRQSEL and
FRQTBL settings. Output signal format is selected by SFOUT pins. Out-
put is differential for LVPECL, LVDS, and CML compatible modes. For
CMOS format, both output pins drive identical single-ended clock out-
puts.
Ground Pad.
The ground pad must provide a low thermal and electrical impedance to
a ground plane.
Preliminary Rev. 0.34
11