SI5326 Datasheet, PDF (10/16 Pages) Silicon Laboratories – ANY-RATE PRECISION CLOCK MULTIPLIER/JITTER ATTENUATOR

Si5326
Pin # Pin Name I/O Signal Level
Description
23
SDA_SDO I/O LVCMOS Serial Data.
In I²C control mode (CMODE = 0), this pin functions as the bidirec-
tional serial data port.
In SPI control mode (CMODE = 1), this pin functions as the serial
data output.
25
A1
I
LVCMOS Serial Port Address.
24
A0
In I²C control mode (CMODE = 0), these pins function as hard-
ware controlled address bits.
In SPI control mode (CMODE = 1), these pins are ignored.
26
A2_SS
I
LVCMOS Serial Port Address/Slave Select.
In I²C control mode (CMODE = 0), this pin functions as a hardware
controlled address bit.
In SPI control mode (CMODE = 1), this pin functions as the slave
select input.
27
SDI
I
LVCMOS Serial Data In.
In I²C control mode (CMODE = 0), this pin is ignored.
In SPI control mode (CMODE = 1), this pin functions as the serial
data input.
29
CKOUT1– O
28
CKOUT1+
Multi
Output Clock 1.
Differential output clock with a frequency range of 10 MHz to
1.4175 GHz. Output signal format is selected by SFOUT1_REG
register bits. Output is differential for LVPECL, LVDS, and CML
compatible modes. For CMOS format, both output pins drive iden-
tical single-ended clock outputs.
34
CKOUT2– O
35
CKOUT2+
Multi
Output Clock 2.
Differential output clock with a frequency range of 10 MHz to
1.4175 GHz. Output signal format is selected by SFOUT2_REG
register bits. Output is differential for LVPECL, LVDS, and CML
compatible modes. For CMOS format, both output pins drive iden-
tical single-ended clock outputs.
36
CMODE
I
LVCMOS Control Mode.
Selects I²C or SPI control mode for the Si5326.
0 = I²C Control Mode
1 = SPI Control Mode
GND PAD
GND
GND
Supply
Ground Pad.
The ground pad must provide a low thermal and electrical
impedance to a ground plane.
Note: Internal register names are indicated by underlined italics, e.g. INT_PIN. See Si5326 Register Map.
10
Confidential Rev. 0.2