S-1004NA10I-M5T1U Datasheet, PDF (28/42 Pages) Seiko Instruments Inc – Release delay time accuracy

BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) VOLTAGE DETECTOR WITH SENSE PIN
S-1004 Series
Rev.2.1_01
8. Nch transistor output current (IOUT) vs. VDS
S-1004Nx12
Ta = +25°C,
VSENSE = 0.0 V (during detection)
20.0
VDD = 4.8 V ^{VDD = 6.0 V}
15.0
10.0
5.0
0.0
0.0
VDD = 3.6 V
VDD = 2.4 V
VDD = 1.2 V
VDD = 0.95 V
1.0 2.0 3.0 4.0 5.0 6.0
VDS [V]
9. Pch transistor output current (IOUT) vs. VDS
S-1004Cx12
Ta = +25°C,
VSENSE = −VDET(S) + 1.0 V (during release)
40.0
30.0
VDD = 8.4 V
VDD = 0.95 V
VDD = 1.2 V
VDD = 7.2 V
20.0
VDD = 6.0 V
10.0
0.0
0.0
VDD = 4.8 V
VDD = 3.6 V
VDD = 2.4 V
2.0 4.0 6.0 8.0
10.0
VDS [V]
10. Nch transistor output current (IOUT) vs. Power supply voltage (VDD)
S-1004Nx12
VDS = 0.5 V,
VSENSE = 0.0 V (during detection)
4.0
Ta = 40C
3.0
2.0
Ta = 85C ^{Ta = 25C}
1.0
0.0
0.0 2.0 4.0 6.0 8.0 10.0
VDD [V]
11. Pch transistor output current (IOUT) vs. Power supply voltage (VDD)
S-1004Cx12
VDS = 0.5 V,
VSENSE = −VDET(S) + 1.0 V (during release)
5.0
Ta = 40C
4.0
3.0
2.0
Ta = 25C
1.0
Ta = 85C
0.0
0.0 2.0 4.0 6.0 8.0 10.0
VDD [V]
12. Minimum operation voltage (VOUT) vs. Power supply voltage (VDD)
S-1004Nx10
VSENSE = VDD,
S-1004Nx10
VSENSE = VDD,
Pull-up to VDD, Pull-up resistance: 100 kΩ
Pull-up to 10 V, Pull-up resistance: 100 kΩ
1.8
12.0
1.6
1.4
1.2
1.0
0.8 _{Ta = 40C}
0.6
Ta = 25C
10.0
8.0
Ta = 40C
Ta = 25C
6.0
Ta = 85C
4.0
0.4
0.2
Ta = 85C
2.0
0.0
0.0
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
VDD [V]
VDD [V]
13. Minimum operation voltage (VOUT) vs. SENSE pin input voltage (VSENSE)
S-1004Nx10
VDD = 0.95 V,
Pull-up to VDD, Pull-up resistance: 100 kΩ
1.8
1.6
1.4
1.2
1.0
0.8
Ta = 40C
0.6
0.4
Ta = 85C
Ta = 25C
0.2
0.0
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
S-1004Nx10
VDD = 0.95 V,
Pull-up to 10 V, Pull-up resistance: 100 kΩ
12.0
10.0
Ta = 40C
8.0
6.0
Ta = 85C
4.0
Ta = 25C
2.0
0.0
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
VSENSE [V]
VSENSE [V]
Remark VDS: Drain-to-source voltage of the output transistor
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