S-1004NA10I-M5T1U Datasheet, PDF (14/42 Pages) Seiko Instruments Inc – Release delay time accuracy

BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) VOLTAGE DETECTOR WITH SENSE PIN
S-1004 Series
Rev.2.1_01
 Explanation of Terms
1. Detection voltage (−VDET)
The detection voltage is a voltage at which the output in Figure 18 or Figure 19 turns to "L". The detection voltage
varies slightly among products of the same specification. The variation of detection voltage between the specified
minimum (−VDET min.) and the maximum (−VDET max.) is called the detection voltage range (Refer to Figure 16).
Example: In the S-1004Cx18, the detection voltage is either one in the range of 1.778 V ≤ −VDET ≤ 1.822 V.
This means that some S-1004Cx18 have −VDET = 1.778 V and some have −VDET = 1.822 V.
2. Release voltage (+VDET)
The release voltage is a voltage at which the output in Figure 18 or Figure 19 turns to "H". The release voltage
varies slightly among products of the same specification. The variation of release voltage between the specified
minimum (+VDET min.) and the maximum (+VDET max.) is called the release voltage range (Refer to Figure 17). The
range is calculated from the actual detection voltage (−VDET) of a product and is in the range of −VDET × 1.03 ≤
+VDET ≤ −VDET × 1.07.
Example: For the S-1004Cx18, the release voltage is either one in the range of 1.832 V ≤ +VDET ≤ 1.949 V.
This means that some S-1004Cx18 have +VDET = 1.832 V and some have +VDET = 1.949 V.
V_SENSE
−V_DET max.
−V_DET min.
Detection voltage
Detection voltage
range
Release voltage
+V_DET max.
+V_DET min.
V_SENSE
Release voltage
range
V_OUT
t_DET
Figure 16 Detection Voltage
VOUT
t_RESET
Figure 17 Release Voltage
V_DD
VDD
R
100 kΩ
V_DD
VDD
SENSE OUT
SENSE OUT
+
V
VSS CD
+
V
+
V
VSS CD
+
V
Figure 18 Test Circuit of Detection Voltage
and Release Voltage
(Nch open-drain output product)
Figure 19 Test Circuit of Detection Voltage
and Release Voltage
(CMOS output product)
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