S-808XXC Datasheet, PDF (25/58 Pages) Seiko Instruments Inc – SUPER-SMALL PACKAGE HIGH-PRECISION VOLTAGE DETECTOR

Rev.4.3_00
V_DD
(−V_DET) Max.
(−V_DET) Min.
SUPER-SMALL PACKAGE HIGH-PRECISION VOLTAGE DETECTOR
S-808xxC Series
Detection voltage
Detection voltage range
Release voltage
(+V_DET) Max.
(+V_DET) Min.
V_DD
Release voltage range
OUT
OUT
Figure 21 Detection Voltage (CMOS Output Products) Figure 22 Release Voltage (CMOS Output Products)
Remark Although the detection voltage and release voltage overlap in the range of 1.514 V to 1.530 V,
+V_DET is always larger than −V_DET.
2. Hysteresis Width (V_HYS)
The hysteresis width is the voltage difference between the detection voltage and the release voltage (The
voltage at point B −The voltage at point A =V_HYS in Figure 18). The existence of the hysteresis width
prevents malfunction caused by noise on input signal.
3. Through-type Current
The through-type current refers to the current that flows instantaneously at the time of detection and release
of a voltage detector. The through-type current is large in CMOS output products, small in Nch open-drain
output products.
4. Oscillation
In applications where a resistor is connected to the voltage detector input (Figure 23), taking a CMOS active
low product for example, the through-type current which is generated when the output goes from low to high
(release) causes a voltage drop equal to [through-type current]×[input resistance] across the resistor. When
the input voltage drops below the detection voltage (−V_DET) as a result, the output voltage goes to low level.
In this state, the through-type current stops and its resultant voltage drop disappears, and the output goes
from low to high. A through-type current is again generated, a voltage drop appears, and repeating the
process finally induces oscillation.
VDD
R_A
V_IN
S-808xxCL
OUT
R_B
VSS
Figure 23 An Example for Bad Implementation of Input Voltage Divider
Seiko Instruments Inc.
25