S1009 Datasheet, PDF (24/43 Pages) Seiko Instruments Inc – SUPER-LOW CURRENT CONSUMPTION SUPER HIGH-ACCURACY VOLTAGE

SUPER-LOW CURRENT CONSUMPTION SUPER HIGH-ACCURACY VOLTAGE DETECTOR WITH DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING)
S-1009 Series
Rev.5.1_00
V_IH^*1
Input voltage
V_IL^*2
V_DD^*3
Output voltage
1 μs
t_PHL
1 μs
R^*1
t_PLH
V_DD
+ ^VDD _OUT
100 kΩ
V_DD^*3 × 90%
V _{VSS CD}
C_OUT
V_DD1^*1
+
V
V_DD^*3 × 10%
*1. V_IH = 10 V
*2. V_IL = 0.7 V
*3. CMOS output product: V_DD
Nch open-drain product: V_DD1
Figure 24 Test Condition of Response Time
*1. R and V_DD1 are unnecessary for CMOS output
product.
Figure 25 Test Circuit of Response Time
Caution
1. The above connection diagram and constant will not guarantee successful operation.
Perform thorough evaluation using the actual application to set the constant.
2. When the CD pin is open, a double pulse may appear at release.
To avoid the double pulse, attach 100 pF or more capacitor to the CD pin.
Response time when detecting (t_PHL) is not affected by CD pin capacitance. Besides, response
time when releasing (t_PLH) can be set the delay time by attaching the CD pin.
Refer to "11. Delay time (t_D) vs. CD pin capacitance (C_D) (without output pin capacitance)" for
details.
11. Delay time (t_D) vs. CD pin capacitance (C_D) (without output pin capacitance)
S-1009N08
10000
Ta = +25°C
S-1009N11
10000
1000
1000
100
100
10
10
1
1
0.1
0.1
1
10
100 1000
CD [nF]
0.1
0.1
1
10
CD [nF]
Ta = +25°C
100 1000
S-1009N12
10000
1000
100
10
1
0.1
0.1
Ta = +25°C
1
10
100 1000
CD [nF]
S-1009N46
10000
1000
100
10
1
0.1
0.1
Ta = +25°C
1
10
100 1000
CD [nF]
24
Seiko Instruments Inc.