S1009 Datasheet, PDF (16/43 Pages) Seiko Instruments Inc – SUPER-LOW CURRENT CONSUMPTION SUPER HIGH-ACCURACY VOLTAGE

SUPER-LOW CURRENT CONSUMPTION SUPER HIGH-ACCURACY VOLTAGE DETECTOR WITH DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING)
S-1009 Series
Rev.5.1_00
„ Explanation of Terms
1. Detection voltage (−V_DET)
The detection voltage is a voltage at which the output in Figure 21 turns to "L". The detection voltage varies slightly
among products of the same specification. The variation of detection voltage between the specified minimum
(−V_DET min.) and the maximum (−V_DET max.) is called the detection voltage range (refer to Figure 19).
Example: In the S-1009C15, the detection voltage is either one in the range of 1.488 V ≤ −V_DET ≤ 1.512 V.
This means that some S-1009C15 have −V_DET = 1.488 V and some have −V_DET = 1.512 V.
2. Release voltage (+V_DET)
The release voltage is a voltage at which the output in Figure 21 turns to "H". The release voltage varies slightly
among products of the same specification. The variation of release voltages between the specified minimum (+V_DET
min.) and the maximum (+V_DET max.) is called the release voltage range (refer to Figure 20). The range is
calculated from the actual detection voltage (−V_DET) of a product and is in the range of −V_DET × 1.04 ≤ +V_DET ≤ −V_DET
× 1.06.
Example: For the S-1009C15, the release voltage is either one in the range of 1.548 V ≤ +V_DET ≤ 1.602 V.
This means that some S-1009C15 have +V_DET = 1.548 V and some have +V_DET = 1.602 V.
V_DD
−V_DET max.
−V_DET min.
Detection voltage
Detection voltage
range
Release voltage
+V_DET max.
+V_DET min.
V_DD
Release voltage
range
OUT
Figure 19 Detection Voltage
OUT
Delay time
Figure 20 Release Voltage
V_DD
+ ^{VDD OUT}
V _{VSS CD}
C_D
R^*1
100 kΩ
+
V
*1. R is unnecessary for CMOS output product.
Figure 21 Test Circuit of Detection Voltage and Release Voltage
16
Seiko Instruments Inc.