S-19100N12H-M5T2U Datasheet, PDF (23/45 Pages) Seiko Instruments Inc – BUILT-IN DELAY CIRCUIT

FOR AUTOMOTIVE 105°C OPERATION VOLTAGE DETECTOR BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING)
Rev.2.0_01
S-19100xxxH Series
V_IH^*1
Input voltage
V_IL^*2
V_DD^*3
Output voltage
1 μs
t_PHL
1 μs
R^*1
t_PLH
V_DD
+ ^VDD _OUT
100 kΩ
V_DD^*3 × 90%
V _{VSS CD}
C_OUT
V_DD1^*1
+
V
V_DD^*3 × 10%
*1. VIH = 10 V
*2. VIL = 0.8 V
*3. CMOS output product: VDD
Nch open-drain product: VDD1
Figure 22 Test Condition of Response Time
*1. R and VDD1 are unnecessary for CMOS output
product.
Figure 23 Test Circuit of Response Time
Caution
1. The above connection diagram and constant will not guarantee successful operation.
Perform thorough evaluation using the actual application to set the constant.
2. When the CD pin is open, a double pulse may appear at release.
To avoid the double pulse, attach 100 pF or more capacitor to the CD pin.
Response time when detecting (tPHL) is not affected by CD pin capacitance. Besides, response
time when releasing (tPLH) can set the delay time by attaching the CD pin.
Refer to "11. Delay time (tD) vs. CD pin capacitance (CD) (without output pin capacitance)" for
details.
11. Delay time (tD) vs. CD pin capacitance (CD) (without output pin capacitance)
S-19100C12
10000
1000
100
Ta = −40°C
Ta = +25°C
S-19100C46
10000
1000
100
Ta = −40°C
Ta = +25°C
10
Ta = +105°C
10
Ta = +105°C
1
1
0.1
0.1
1
10
100 1000
CD [nF]
0.1
0.1
1
10
100
CD [nF]
1000
23