S-19100N12H-M5T2U Datasheet, PDF (13/45 Pages) Seiko Instruments Inc – BUILT-IN DELAY CIRCUIT

FOR AUTOMOTIVE 105°C OPERATION VOLTAGE DETECTOR BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING)
Rev.2.0_01
S-19100xxxH Series
2. Delay circuit
The delay circuit delays the output signal to the OUT pin from the time at which the power supply voltage (VDD)
exceeds the release voltage (+VDET) when the power supply voltage (VDD) is turned on. The output signal is not
delayed when VDD decreases to the detection voltage (−VDET) or less (refer to "Figure 14 Operation 2").
The delay time (tD) is determined by the time constant of the built-in constant current (approx. 100 nA) and the
attached delay capacitor (CD), or the delay time when the CD pin is open (tD0), and calculated from the following
equation. When the CD value is sufficiently large, the tD0 value can be ignored.
tD [ms] = Delay coefficient × CD [nF] + tD0 [ms]
Operation
Temperature
Ta = +105°C
Ta = +25°C
Ta = −40°C
Table 11
Min.
2.58
4.70
5.64
Delay Coefficient
Delay Coefficient
Typ.
3.70
5.47
8.40
Max.
5.40
6.24
12.01
Operation Temperature
Ta = −40°C to +105°C
Table 12 Delay Time
Delay Time when CD Pin is Open (tD0)
Min.
Typ.
Max.
0.01 ms
0.10 ms
0.80 ms
Caution 1.
When the CD pin is open, a double pulse shown in Figure 15 may appear at release.
To avoid the double pulse, attach 100 pF or more capacitor to the CD pin. Do not apply
voltage to the CD pin from the exterior.
V_OUT
Figure 15
Time
2. Mounted board layout should be made in such a way that no current flows into or flows from
the CD pin since the impedance of the CD pin is high, otherwise correct delay time cannot be
provided.
3. There is no limit for the capacitance of CD as long as the leakage current of the capacitor can
be ignored against the built-in constant current value. Leakage current causes deviation in
delay time. When the leakage current is larger than the built-in constant current, no release
takes place.
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