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S-93C46C Datasheet, PDF (15/39 Pages) Seiko Instruments Inc – 3-WIRE SERIAL E2PROM
Rev.1.1_00
3-WIRE SERIAL E2PROM
S-93C46C/56C/66C/76C/86C
3. Writing (WRITE, ERASE, WRAL, ERAL)
A write operation includes four write instructions: data write (WRITE), data erase (ERASE), chip write (WRAL), and
chip erase (ERAL).
A write instruction (WRITE, ERASE, WRAL, ERAL) starts a write operation to the memory cell when "L" is input to the
CS pin after a specified number of clocks have been input. The SK pin and the DI pin inputs are invalid during the
write period, so do not input an instruction.
Input an instruction while the output status of the DO pin is "H" or "High-Z".
A write operation is valid only in program enable mode (refer to "4. Write enable (EWEN) / write disable (EWDS)").
3. 1 Verify operation
A write operation executed by any instruction is completed within 4 ms (write time tPR), so if the completion of the
write operation is recognized, the write cycle can be minimized. A sequential operation to confirm the status of a
write operation is called a verify operation.
3. 1. 1 Operation method
After the write operation has started (CS pin = "L"), the status of the write operation can be verified by
confirming the output status of the DO pin by inputting "H" to the CS pin again. This sequence is called a verify
operation, and the period that "H" is input to the CS pin after the write operation has started is called the verify
operation period.
The relationship between the output status of the DO pin and the write operation during the verify operation
period is as follows.
(1) DO pin = "L": Writing in progress (busy)
(2) DO pin = "H": Writing completed (ready)
3. 1. 2 Operation example
There are two methods to perform a verify operation: Waiting for a change in the output of the DO pin while
keeping the CS pin "H", or suspending the verify operation (CS pin = "L") once and then performing it again to
verify the output of the DO pin. The latter method allows the CPU to perform other processing during the wait
period, allowing an efficient system to be designed.
Caution 1. Input "L" to the DI pin during a verify operation.
2. If "H" is input to the DI pin at the rising of the SK pulse when the output status of the DO pin is
"H", this IC latches the instruction assuming that a start bit has been input. In this case, note
that the DO pin immediately enters "High-Z".
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