S-93C46C Datasheet, PDF (13/39 Pages) Seiko Instruments Inc – 3-WIRE SERIAL E2PROM

Rev.1.1_00
3-WIRE SERIAL E²PROM
S-93C46C/56C/66C/76C/86C
 Operation
All instructions are executed by inputting the DI pin in synchronization with the rising of the SK pulse after the CS pin
goes to "H". An instruction set is input in the order of start bit, instruction, address, and data.
Instruction input finishes when the CS pin goes to "L". "L" must be input to the CS pin between commands during t_CDS.
While "L" is being input to the CS pin, this IC is in standby mode, so the SK pin and the DI pin inputs are invalid and no
instructions are allowed.
1. Start Bit
A start bit is recognized when the DI pin goes to "H" at the rising of the SK pulse after the CS pin goes to "H". After the
CS pin goes to "H", a start bit is not recognized even if the SK pulse is input as long as the DI pin is "L".
1. 1 Dummy clock
The SK clocks input while the DI pin is "L" before a start bit is input are called dummy clocks. Dummy clocks are
effective when aligning the number of instruction sets (clocks) sent by the CPU with those required for serial
memory operation. For example, when the CPU instruction set is 16 bits, the number of instruction set clocks can
be adjusted by inserting the 7-bit dummy clock in S-93C46C, the 5-bit dummy clock in S-93C56C/66C and the
3-bit dummy clock in S-93C76C/86C.
1. 2 Start bit input failure
(1) When the output of the DO pin is "H" during the verify period after a write operation, if "H" is input to the DI pin
at the rising of the SK pulse, this IC recognizes that a start bit has been input. To prevent this failure, input "L"
to the DI pin during the verify operation period (refer to "3. 1 Verify operation").
(2) When a 3-wire interface is configured by connecting the DI input pin and the DO output pin, a period in which
the data output from the CPU and the serial memory collide may be generated, preventing successful input of
the start bit. Take the measures described in " 3-Wire Interface (Direct Connection between DI Pin and
DO Pin)".
2. Reading (READ)
The READ instruction reads data from a specified address.
After the CS pin goes to "H", input an instruction in the order of the start bit, read instruction, and address. Since the
last input address (A₀) has been latched, the output status of the DO pin changes from "High-Z" to "L", which is held
until the next rising of the SK pulse. 16-bit data starts to be output in synchronization with the next rising of the SK
pulse.
2. 1 Sequential read
After the 16-bit data at the specified address has been output, inputting the SK pulse while the CS pin is "H"
automatically increments the address, and causes the 16-bit data at the next address to be output sequentially.
The above method makes it possible to read the data in the whole memory space. The last address (A_n  A₁
A₀ = 1  1 1) rolls over to the top address (A_n  A₁ A₀ = 0  0 0).
13