S-1740 Datasheet, PDF (10/47 Pages) ABLIC Inc. – 5.5 V INPUT, 100 mA VOLTAGE REGULATOR WITH SUPPLY VOLTAGE DIVIDED OUTPUT

POWER MONITORING OUTPUT, 5.5 V INPUT, 100 mA CMOS VOLTAGE REGULATOR WITH 0.5 μA SUPER LOW CURRENT CONSUMPTION
S-1740/1741 Series
Rev.1.1_00
2. Power monitor block
Table 15
(Ta = +25°C unless otherwise specified)
Item
Symbol
Condition
Min.
Typ.
Max.
Unit
Test
Circuit
Output voltage^*1
Load current
Output offset voltage
Output impedance
Power-up time
Current consumption
during operation^*2
V_PMOUT(S)
V_IN = 3.6 V,
−10 μA ≤ I_PMOUT ≤ 10 μA
S-1740 Series − V_IN/2 −
V
4
S-1741 Series − V_IN/3 −
V
4
I_PMOUT
V_IN = 3.6 V
−10
−
10 μA
−
V_POF
V_IN = 3.6 V, −10 μA ≤ I_PMOUT ≤ 10 μA
−30
−
30 mV
4
R_PS
V_IN = 3.6 V, −10 μA ≤ I_PMOUT ≤ 10 μA
−
− 1000 Ω
4
t_PU
S-1740/1741 Series A / C type,
V_IN = 3.6 V, C_PM = 220 nF, no load
−
5
10 ms
4
I_SS1P
V_IN = 3.6 V, V_PMEN = V_IN, no load
− 0.15 0.23 μA 5
Input voltage
V_IN
−
1.5
− 5.5 V
−
PMEN pin input voltage "H"
V_PSH
V_IN = 3.6 V, determined by
V_PMOUT output level
1.0
−
−
V
6
PMEN pin input voltage "L"
V_PSL
S-1740/1741
V_IN = 3.6 V, determined by
Series A / C type V_PMOUT output level
−
− 0.25 V
6
PMEN pin input current "H"
I_PSH
V_IN = 3.6 V, V_PMEN = V_IN
−0.1 − 0.1 μA 6
PMEN pin input current "L"
I_PSL
V_IN = 3.6 V, V_PMEN = 0 V
−0.1 − 0.1 μA 6
"L" output Nch ON resistance R_PLOW
S-1740/1741 Series A / C type,
V_IN = 3.6 V, V_PMEN = 0 V, V_PMOUT = 0.1 V
−
2.8
− kΩ
7
*1. V_PMOUT(S): Set output voltage
V_PMOUT(S) + V_POF: Actual output voltage
*2. Increased current value from the current consumption during operation (I_SS1) of the regulator block when the power
monitoring output is enabled.
10