HYS6472V4200GU Datasheet, PDF (7/15 Pages) Siemens Semiconductor Group – 3.3V 4M x 64/72-Bit 1 BANK SDRAM Module 3.3V 8M x 64/72-Bit 2 BANK SDRAM Module

HYS64(72)V4200/8220GU
SDRAM-Modules
Operating Currents (T_A = 0 to 70^oC, Vdd = 3.3V ± 0.3V 1)
(Recommended Operating Conditions unless otherwise noted)
Parameter & Test Condition
OPERATING CURRENT
Symb. -8/-8B -10
max.
trc=trcmin., tck=tckmin.
Ouputs open, Burst Length = 4, CL=3
All banks operated in random access,
all banks operated in ping-pong manner
to maximize gapless data access
PRECHARGE STANDBY CURRENT in tck = min.
Power Down Mode
CS =VIH (min.), CKE<=Vil(max)
tck = Infinity
PRECHARGE STANDBY CURRENT in tck = min.
Non-Power Down Mode
CS = VIH (min.), CKE>=Vih(min)
tck = Infinity
ICC1 130
90
ICC2P
2
2
ICC2PS
1
1
ICC2N
35
30
ICC2NS
5
5
NO OPERATING CURRENT
tck = min., CS = VIH(min),
active state ( max. 4 banks)
CKE>=VIH(min.) ICC3N
45
40
CKE<=VIL(max.) ICC3P
8
8
BURST OPERATING CURRENT
tck = min.,
Read command cycling
AUTO REFRESH CURRENT
tck = min.,
Auto Refresh command cycling
SELF REFRESH CURRENT
Self Refresh Mode, CKE=0.2V
ICC4 100
70
ICC5
130
90
standard version ICC6
1
1
Note
mA 1
mA 1
mA 1
mA 1
mA 1
mA 1
mA 1
mA 1,2
mA 1
mA 1
Semiconductor Group
7