HYS6472V4200GU Datasheet, PDF (4/15 Pages) Siemens Semiconductor Group – 3.3V 4M x 64/72-Bit 1 BANK SDRAM Module 3.3V 8M x 64/72-Bit 2 BANK SDRAM Module

HYS64(72)V4200/8220GU
SDRAM-Modules
CS0
DQMB0
DQ(7:0)
DQMB1
DQ(15:8)
CB(7:0)
Vcc
CS2
DQMB2
DQ(23:16)
DQMB3
DQ(31:24)
CS
LDQM
DQ0-DQ7
UDQM
DQ8-DQ15
D0
CS
LDQM
DQ0-DQ7
UDQM
DQ8-DQ15
D4
CS
LDQM
DQ0-DQ7
UDQM
DQ8-DQ15
D1
DQMB4
DQ32-DQ39
DQMB5
DQ40-DQ47
DQMB6
DQ(55:48)
DQMB7
DQ(63:56)
CS
LDQM
DQ0-DQ7
UDQM
DQ8-DQ15
D2
CS
LDQM
DQ0-DQ7
UDQM
DQ8-DQ15
D3
A0-A11, BA0, BA1
D0 - D3, (D4)
VCC
VSS
D0 - D3, (D4)
C
D0 - D3, (D4)
RAS, CAS, WE
D0 - D3, (D4)
CKE0
CLK1,CLK3
D0 - D3, (D4)
10 pF
E²PROM (256wordx8bit)
SA0
SA1
SA0
SA1 ^SDA
SA2
SA2 WP
SCL
SCL
47k
CLK0
CLK1
CLK2
CLK3
Clock Wiring
4M x 64
4M x 72
2 SDRAM+15pF 3 SDRAM+10pF
Termination
Termination
2 SDRAM+15pF 2 SDRAM+15pF
Termination
Termination
notes: 1) all resistors are 10 Ohms
2) D4 is only used in the x72 ECC version
3) DIMM may combine bytes 0 with 4, 1 with 5, 2 with 6 and 3 with 7 to obtain most advantagous
board layout to obtain minimum DQ trance length
Block Diagram for 4M x 64 and 4M x 72 1 bank SDRAM DIMM modules (HYS64V4200GU)
Semiconductor Group
4