HYM641010GS-60- Datasheet, PDF (7/11 Pages) Siemens Semiconductor Group – 1M x 64-Bit Dynamic RAM Module

HYM 641010/20GS-60/-70
1M x 64 Module
AC Characteristics (note: 5,6,7,8)
T_A = 0 to 70 °C,V_CC = 5.0 ± 10 %
Parameter
common parameters
Random read or write cycle time
RAS precharge time
RAS pulse width
CAS pulse width
CAS precharge time
Row address setup time
Row address hold time
Column address setup time
Column address hold time
RAS to CAS delay time
RAS to column address delay time
RAS hold time
CAS hold time
CAS to RAS precharge time
Transition time (rise and fall)
Refresh period
Symbol
-60
-70
Unit Note
min. max. min. max.
t_RC
110 –
130 –
ns
t_RP
40 –
50 –
ns
t_RAS
60 100k 70 100k ns
t_CAS
15 100k 20 100k ns
t_CP
10 –
10 –
ns
t_ASR
5
–
5
–
ns 9
t_RAH
8
–
8
–
ns 10
t_ASC
2
–
2
–
ns 11
t_CAH
15 –
20 –
ns 9
t_RCD
18 40 18 45
12
t_RAD
13 25 13 30 ns 12
t_RSH
20 –
25 –
ns 9
t_CSH
58 –
68 –
ns 10
t_CRP
10 –
10 –
ns 9
t_T
3
30 3
30
ns 7
t_REF
–
16 –
16 ms
Read Cycle
Access time from RAS
t_RAC
Access time from CAS
t_CAC
Access time from column address
t_AA
OE access time
t_OEA
Column address to RAS lead time
t_RAL
Read command setup time
t_RCS
Read command hold time
t_RCH
Read command hold time referenced t_RRH
to RAS
CAS to output in low-Z
t_CLZ
Output buffer turn-off delay
t_OFF
Output buffer turn-off delay from OE t_OEZ
–
60 –
70
ns 13,14
–
20 –
25
ns ^9,13,14
–
35 –
40
ns ^{9,13, 15}
–
20 –
25
ns 9,13
35 –
40 –
ns 9
2
–
2
–
ns 11
2
–
2
–
ns 11,16
0
–
0
–
ns 16
2
–
2
–
ns 11,13
–
20 –
25
ns 9,17
–
20 –
25
ns 9,17
Semiconductor Group
7