HYB514256B Datasheet, PDF (7/22 Pages) Siemens Semiconductor Group – 256 K x 4-Bit Dynamic RAM Low Power 256 K x 4-Bit Dynamic RAM

HYB 514256B/BL/BJ/BJL-50/-60/-70
256 K × 4-DRAM
AC Characteristics ^{4) 13)}
T_A = 0 to 70 ˚C; V_CC = 5 V ± 10 %; t_T = 5 ns
Parameter
Symbol
Limit Values
Unit
-50
-60
-70
min. max. min. max. min. max.
Random read or write cycle t_RC
95 –
110 –
130 –
ns
time
Read-modify-write cycle time t_RWC
140 –
160 –
185 –
ns
Fast page mode cycle time t_PC
35 –
40 –
45 –
ns
Fast page mode read-modify- t_PRWC
80 –
90 –
100 –
ns
write cycle time
Access time from RAS
t 6) 11)
RAC
– 50
– 60
– 70
ns
Access time from CAS
t 6) 11)
CAC
– 15
– 15
– 20
ns
Access time from column
t_AA
– 25
– 30
– 35
ns
address
6) 12)
Access time from CAS
t_CPA
– 30
– 35
– 40
ns
precharge
6) 12)
CAS to output in low-Z
t 4)
CLZ
0–
0–
0–
ns
Output buffer
turn-off delay
t_OFF
0 15
0 20
0 20
ns
7)
Transition time
(rise and fall)
t_T
5)
3 50
3 50
3 50
ns
RAS precharge time
RAS pulse width
RAS pulse width
(fast page mode)
t_RP
t_RAS
t_RASP
35 –
40 –
50 –
ns
50 10.000 60 10.000 70 10.000 ns
50 100.000 60 100.000 70 100.000 ns
RAS hold time
CAS hold time
CAS pulse width
RAS hold time from CAS
precharge (Fast Page Mode)
t_RSH
t_CSH
t_CAS
t_RHCP
15 –
15 –
20 –
ns
50 –
60 –
70 –
ns
15 10.000 15 10.000 20 10.000 ns
30 –
35 –
45 –
ns
CAS precharge to WE delay t_CPWD
55 –
60 –
65 –
ns
time (FPM RMW)
RAS to CAS delay time
t 11)
RCD
20 35
20 45
20 50
RAS to column address delay t_RAD
15 25
15 30
15 35
ns
time
12)
CAS to RAS precharge time t_CRP
5–
5–
5–
ns
CAS precharge time
t_CP
10 –
10 –
10 –
ns
Semiconductor Group
61