HYB5117805BSJ-50- Datasheet, PDF (7/25 Pages) Siemens Semiconductor Group – 2M x 8 - Bit Dynamic RAM 2k Refresh

HYB5117805BSJ-50/-60/-70
2M x 8-EDO DRAM
AC Characteristics ⁵⁾⁶⁾
16E
T_A = 0 to 70 °C,V_CC = 5 V ± 10 %, t_T = 2 ns
Parameter
Symbol
Limit Values
Unit Note
-50
-60
-70
min. max. min. max. min. max.
common parameters
Random read or write cycle time t_RC
RAS precharge time
t_RP
RAS pulse width
t_RAS
CAS pulse width
t_CAS
Row address setup time
t_ASR
Row address hold time
t_RAH
Column address setup time
t_ASC
Column address hold time
t_CAH
RAS to CAS delay time
t_RCD
RAS to column address delay
t_RAD
RAS hold time
t_RSH
CAS hold time
t_CSH
CAS to RAS precharge time
t_CRP
Transition time (rise and fall)
t_T
Refresh period
t_REF
84 –
104 –
124 –
ns
30 –
40 –
50 –
ns
50 10k 60 10k 70 10k ns
8
10k 10 10k 12 10k ns
0
–
0
–
0
–
ns
8
–
10 –
10 –
ns
0
–
0
–
0
–
ns
8
–
10 –
12 –
ns
12 37 14 45 14 53 ns
10 25 12 30 12 35 ns
13
15 –
17 –
ns
40
50 –
60 –
ns
5
–
5
–
5
–
ns
1
50 1
50 1
50 ns 7
–
32 –
32 –
32 ms
Read Cycle
Access time from RAS
t_RAC
Access time from CAS
t_CAC
Access time from column address t_AA
OE access time
t_OEA
Column address to RAS lead time t_RAL
Read command setup time
t_RCS
Read command hold time
t_RCH
Read command hold time
t_RRH
referenced to RAS
CAS to output in low-Z
t_CLZ
Output buffer turn-off delay
t_OFF
Output turn-off delay from OE t_OEZ
–
50 –
60 –
70 ns 8, 9
–
13 –
15 –
17 ns 8, 9
–
25 –
30 –
35 ns 8,10
–
13 –
15 –
17 ns
25 –
30 –
35 –
ns
0
–
0
–
0
–
ns
0
–
0
–
0
–
ns 11
0
–
0
–
0
–
ns 11
0
–
0
–
0
–
ns 8
0
13 0
15 0
17 ns 12
0
13 0
15 0
17 ns 12
Semiconductor Group
7