HYB314100BJBJL-50- Datasheet, PDF (6/23 Pages) Siemens Semiconductor Group – 4M x 1-Bit Dynamic RAM Low Power 4M x 1-Bit Dynamic RAM

HYB 314100BJ/BJL-50/-60/-70
3.3V 4M x 1 DRAM
DC Characteristics (cont’d)
T_A = 0 to 70 ˚C, V_SS = 0 V, V_CC = 3.3 V ± 0.3 V , t_T = 5 ns
Parameter
Symbol Limit Values
min.
max.
Average V_CC supply current during
CAS before RAS refresh mode
-50 version
-60 version
-70 version
I_CC6
–
70
–
60
–
55
For Low Power Version only:
I_CC7
–
250
Battery backup current (average power supply
current in battery backup mode):
(CAS = CAS before RAS cycling or 0.2 V,
WE = V_CC – 0.2 V or 0.2 V,
A0 to A10 = V_CC – 0.2 V or 0.2 V;
DI = V_CC – 0.2 V or 0.2 V or open,
t_RC = 125 µs, t_RAS = t_RAS min = 1 µs)
Unit Test
Condition
mA ²⁾⁴⁾
µA –
Capacitance
T_A = 0 to 70 ˚C; V_CC = 3.3 V ± 0.3 V; f = 1 MHz
Parameter
Symbol
Limit Values
Unit
min.
max.
Input capacitance (A0 to A10, DI)
Input capacitance (RAS, CAS, WE)
Output capacitance (DO)
C_I1
–
5
pF
C_I2
–
7
pF
C_IO
–
7
pF
Semiconductor Group
6