HYB314100BJBJL-50- Datasheet, PDF (1/23 Pages) Siemens Semiconductor Group – 4M x 1-Bit Dynamic RAM Low Power 4M x 1-Bit Dynamic RAM

4M x 1-Bit Dynamic RAM
Low Power 4M x 1-Bit Dynamic RAM
HYB 314100BJ/BJL -50/-60/-70
Advanced Information
• 4 194 304 words by 1-bit organization
• 0 to 70 ˚C operating temperature
• Fast Page Mode Operation
• Performance:
t_RAC RAS access time
t_CAC CAS access time
t_AA
Access time from address
t_RC
Read/Write cycle time
t_PC
Fast page mode cycle time
-50 -60 -70
50 60 70 ns
13 15 20 ns
25 30 35 ns
95 110 130 ns
35 40 45 ns
• Single + 3.3 V (± 0.3 V ) supply with a built-in V_bb generator
• Low power dissipation
max. 252 mW active (-50 version)
max. 216 mW active (-60 version)
max. 198 mW active (-70 version)
• Standby power dissipation:
7.2 mW max. standby (TTL)
3.6 mW max. standby (CMOS)
720 µW max. standby (CMOS) for Low Power Version
• Output unlatched at cycle end allows two-dimensional chip selection
• Read, write, read-modify write, CAS-before-RAS refresh, RAS-only refresh,
hidden refresh and test mode capability
• All inputs and outputs TTL-compatible
• 1024 refresh cycles / 16 ms
• 1024 refresh cycles / 128 ms Low Power Version
• Plastic Packages: P-SOJ-26/20-5 with 300 mil width
Semiconductor Group
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4.96