English
Language : 

PEB22554 Datasheet, PDF (328/397 Pages) Siemens Semiconductor Group – ICs for Communications
DCEC…
DEBC…
DCVC…
DFEC…
PEB 22554
Operational Description T1 / J1
Disable CRC Error Counter
Disable Errored Block Counter
Disable Code Violation Counter
Disable Framing Error Counter
These bits are only valid if FMR1.ECM is cleared. They have to be set
before reading the error counters. They will be automatically reset if
the corresponding error counter high byte has been read. With the
rising edge of these bits the error counters are latched and then
cleared.
Semiconductor Group
328
09.98