SDA9255 Datasheet, PDF (17/45 Pages) Siemens Semiconductor Group – SRC-Scan Rate Converter SDA9255

SDA 9255
VOUT, HREF) signals are high active. In the example the register value is 10 and the
mode is '0' (100/120 Hz/interlaced).
FAOPL = NALOP _* 2 + 3 = 10 _* 2 + 3 = 23
So line 23 is the first active output line.
For proper operation the number of not active lines at output side plus the number of
active lines have to be smaller than the total number of lines. The following formula
should be true.
where
AL:
NALOP:
NALOP _* 2 + AL _* 2 + 3 ≤ (No. of lines per frame) DIV 2 (e.g. 312)
Register value
Register value
2.4.2 Number of Not Active Pixels of Output Field
To change the horizontal position of the picture on the screen the NAPOP register value
can be utilized. The not active pixels for output register ( NAPOP ) is used to adjust the
number of not active output pixels of a line. The register value is multiplied by '4' and
has an initial value of 9 ... 12 (HSODLY = 0), depending on the MCNAPIP setting
(subaddress 0B_H and 0C_H, see description of I²C Bus).
FAOPP = NAPOP _* 4 + 9 ... 12 – HSODLY = 0
FAOPP = NAPOP _* 4 + (- 163) ... (- 160) ; HSODLY = 1
is equal to : FAOPP = NAPOP _* 4 + 9 ... 12 – 172 _* HSODLY
where
FAOPP:
NAPOP:
HSODLY:
The first active output pixel after rising edge of HOUT
Register value
Register value
The time from the rising edge of the HOUT signal to the first active output pixel can be
calculated in the following way:
where
* * ^{tNAPOP = ( NAPOP 4 + 9 ... 12 ) tLL2CLK ; HSODLY = 0}
* * ^{tNAPOP = (NAPOP 4 + (- 163) ... (-160)) tLL2CLK ; HSODLY = 1}
t_NAPOP : Time from rising edge of HOUT to first active output pixel
t_LL2CLK : System clock period (e.g. 1/27 MHz)
figure 12 (see chapter 5.6, Example for Not Active Output Pixels) shows the effect of
the register NAPOP.
Semiconductor Group
15
1998-02-01