SM5K3 Datasheet, PDF (24/28 Pages) Sharp Electrionic Components – 4-Bit Single-Chip Microcomputers(Controllers With 10-Bit A/D Converter)

SM5K3/SM5K4/SM5K5
MNEMONIC MACHINE CODE
OPERATION
Arithmetic Instructions
ADX x
A←A+x (I3-I0)
00 to 0F
Skip the next step, if CY = 1
ADD
7A
A←A+M
ADC
COMA
A←A+M+C, C←CY
7B
Skip the next step, if CY = 1
79
A←A–
INCB
BL←BL+1, Skip the next
78
step, if result of BL = 0
DECB
BL←BL–1, Skip the next
7C
step, if result of BL = FH
Test Instructions
TAM
6F
Skip the next step, if A = M
TC
6E
Skip the next step, if C = 1
TM x
Skip the next step, if Mi = 1,
48 to 4B
(i = 3 to 0)
TABL
6B
Skip the next step, if A = BL
TPB x
Skip the next step, if P (R)
4C to 4F
i = 1, (i = I1, I0)
Skip the next step, if IFA = 1
TA
6C
IFA←0
Skip the next step, if IFB = 1
TB
6D
IFB←0
69
Skip the next step, if IFT = 1
TT
02
IFT←0
Bit Operation Instructions
SM x
44 to 47 Mi←1 (i = 3 to 0)
RM x
40 to 43 Mi←0 (i = 3 to 0)
SC
61
C←1
RC
60
C←0
IE
63
IME←1 (Interrupt enable)
ID
62
IME←0 (Interrupt disable)
MNEMONIC MACHINE CODE
OPERATION
I/O Instructions
INL
70
A←P1
OUTL
ANP
ORP
71
P0←A
72
∩ Pj←Pj A ( j = 0, 2, 4, 5)
73
∪ ^{Pj←Pj A ( j = 0, 2, 4, 5)}
A←Pj ( j = 1, 2, 3, 4, 5)
IN
74
X-reg, A←Rj ( j = 8, 9, A, B)
A←Rj ( j = C, E, F)
Pj←A ( j = 0, 2, 4, 5)
OUT
Rj←X-reg, A ( j = 8, 9, B)
75
RA←RB
Rj←A ( j = 3, C, E, F)
Table Search Instruction
Push
PAT
PU←04H, PL←(X1, X0, A)
6A
X-reg←ROMH, A←ROML
Pop
Divider Operation Instruction
69
DR
Divider (f0-f15) clear
03
Special Instructions
STOP
76
Standby mode (STOP)
HALT
77
Standby mode (HALT)
NOP
00
No operation
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