SM5K3 Datasheet, PDF (13/28 Pages) Sharp Electrionic Components – 4-Bit Single-Chip Microcomputers(Controllers With 10-Bit A/D Converter)

SM5K3/SM5K4/SM5K5
Output Latch Register and Mode Register
The SM5K3/5K4/5K5 contain 6 output-latch
registers and 8 mode-registers which either latch
contents of output ports or control some functions
of the SM5K3/5K4/5K5.
These registers, their functions and available
transfer instructions are shown in Table 1 below.
An output latch register sets the output level of the
pin to which it is connected.
Refer to the section of “MODE REGISTERS”
concerning about the details mode registers.
Table 1 Output Latch Registers and Mode Registers
SYMBOL
P0
P1
FUNCTION
Output register
Input register
OUT INL OUT IN/TPB ANP/ORP
O
–
O
–
O
–
O
–
O
–
P2
I/O register (independent)
–
–
O
O
O
P3
Input register (and analog input)
–
–
–
O
–
R3
Control register
–
–
O
–
–
P4
I/O register
P5
I/O register
–
–
O
O
O
–
–
O
O
O
R8∗ A/D data/control register
R9∗ A/D data register
RA∗ Timer/counter register
RB∗ Timer/modulo register
RC
Timer control register
–
–
O
O
–
–
–
O
O
–
–
–
O
O
–
–
–
O
O
–
–
–
O
O
–
RE
Interrupt mask register
RF
P2 directional register
∗ 8-bit register
–
–
O
O
–
–
–
O
O
–
NOTE :
Bit 4 (R84) in the R8 register is read only.
(Read or write operation of this bit does not affect any other operation.)
CONTENT OF BL
0
1
2
3
3
4
5
8
9
A
B
C
E
F
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