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GS6152 Datasheet, PDF (7/80 Pages) Semtech Corporation – Multi-Rate 6G UHD-SDI
Table 1-1: GS6152 Pin Descriptions (Continued)
Pin Number
26
27
28
29, 32, 35
30, 31
33, 34
36
37
38
39
40, 41
42
43
44
45
Name
GPIO3
RST
VCC_DDO1
VEE_DDO
DDO1, DDO1
DDO0, DDO0
VCC_DDO0
VCO_DFT_FILT
VCC_DFT
VEE_DFT
DFT_CLK_IN,
DFT_CLK_IN
VCC_CORE
VEE_CORE
LF+
LF–
Type
Description
Digital
Input/Output
Multi-function Control/Status Input/Output 3.
Signal options are:
LOS
LOCKED
LBR_HBR
RATE_DET0
RATE_DET1
RATE_DET2
LOCKED_125M
LOCKED_270M
LOCKED_1G485
LOCKED_2G97
LOCKED_5G94
RATE_CHANGE
DDO0_DISABLE
DDO1_DISABLE (input; default)
This pin is configured using the GPIO3_SELECT and
GPIO3_IO_SELECT bits in the GPIO_CONTROL_REG_1 register.
Digital Input
Reset pin. If set LOW, all blocks set to default conditions and
inputs/outputs set to high impedance. If HIGH, normal operation of
the device resumes. By default, internally pulled HIGH.
Power
Most positive power supply connection for the DDO1/DDO1 output
driver. Connect to any voltage between 1.2V and 2.5V.
Power
Most negative power supply connections for the output drivers.
Connect to ground.
Output
Differential serial data output 1.
Output
Differential serial data output 0.
Power
Most positive power supply connection for the DDO0/DDO0 output
driver. Connect to any voltage between 1.2V and 2.5V.
Power
Decoupling
Connect through decoupling capacitor to ground.
Power
Connect to 1.8V.
Power
Connect to ground.
Input
Connect to high-speed differential clock (AC coupled internally).
Leave unconnected if not using external DFT clock input feature.
Power
Most positive power supply connection to the analog core
Connect to 1.8V.
Power
Most negative power supply connection to the analog core
Connect to ground.
Passive
Connect to LF– through CLF
Refer to Figure 6-1: GS6152 Typical Application Circuit.
Passive
Connect to LF+ through CLF
Refer to Figure 6-1: GS6152 Typical Application Circuit.
GS6152
Final Data Sheet
PDS-060984
Rev.2
July 2015
www.semtech.com
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