SX8724C Datasheet, PDF (44/67 Pages) Semtech Corporation – ZoomingADC for sensing data acquisition

ADVANCED COMMUNICATIONS & SENSING
SX8724C
ZoomingADC for sensing data acquisition
DATASHEET
Table 26. RegTimout[0x42]
Bit
Bit Name
4:0
-
Mode
rw
Reset
00000
Description
Reserved
Table 27. RegExtAdd[0x43]
Bit
Bit Name
7:0
ExternalRd
Mode
rw
Reset
Description
00000000
Write the 0x96 value into this register to set the two LSbits of the I2C address
by external (D0 and D1).
10.2.3 ZADC Registers
Table 28. RegACOutLsb[0x50]
Bit
Name
7:0
Out[7:0]
Mode
r
Reset
Description
00000000 LSB of the ADC result
Table 29. RegACOutMsb[0x51]
Bit
Name
7:0
Out[15:8]
Mode
r
Reset
Description
00000000 MSB of the ADC result
Table 30. RegACCfg0[0x52]
Bit
Name
7
Start
Mode
rw
6:5
SetNelconv
rw
4:2
SetOsr
rw
1
Continuous
rw
0
-
r
Reset
0
01
010
0
0
Description
Starts an ADC conversion
Sets the number of elementary conversion to 2^SetNelconv.
To compensate for offset the signal is chopped between elementary
conversion.
Sets the ADC over-sampling rate of an elementary conversion to 2^3+SetOsr.
Sets the continuous ADC conversion mode
Reserved
Table 31. RegACCfg1[0x53]
Bit
Name
7:6
IbAmpAdc
5:4
IbAmpPga
Mode
rw
rw
Reset
11
11
Description
Bias current selection for the ADC
Bias current selection for the PGA
Revision 1.01
© Semtech
January 2011
Page 44
www.semtech.com/products/