LC78681E Datasheet, PDF (7/23 Pages) Sanyo Semicon Device – Digital Signal Processor for Compact Disc Players

LC78681E
Continued from preceding page.
No.
Name
38
LRSY
39
CK2
40 ROMOUT
41
C2FCLK
42
C2F
43
DOUT
44
SBSY
45
EFLG
46
PW
47
SFSY
48
SBCK
49
FSX
50
WRQ
51
RWC
52
SQOUT
53
COIN
54
CQCK
55
RES
56
M/L
57
LASER
58
16 M
59
4.2 M
60
CONT
61
TEST5
62
CS
63
X_IN
64
X_OUT
I/O
Description
O
O
O For output of CD-ROM interface signals.
O
O
O Digital OUT output
O Subcode block synchronization output
O C1 and C2 single and double error correction flag.
O
O
SFSY is subcode frame synchronization signal. P, Q, R, S, T, U, V, and W subcodes are read out by sending clock
eight times to SBCK.
I
O 7.35 kHz synchronization signal output
O
I
WRQ goes high when Q subcode data passes the CRC check. Through external connection and sending of CQCK,
O
data is read from SQOUT. Set MSB-first/LSB-first to low when data in LSB-first format is desired.
Command is generated by sending output synchronized with CQCK command data after setting microprocessor RWC
I
to high.
I
I
Set to low at powerup.
I
Same as for pins 50 to 54.
O Permits control via serial control from the microprocessor.
O 16.9344 MHz output pin
O 4.2336 MHz output pin.
O Permits control via serial control from the microprocessor.
I
LSI test input. Normally unconnected.
I
Chip select pin. The LC78681 is active when this pin is low (on-chip pull-down resistor).
I
16.9344 MHz crystal oscillator connection pins.
O
Functional Description
HF Signal Input Circuit (pin 8: EFMIN, pin 7: EFMO and pin 6: EFMO)
An EFM signal (NRZ) sliced at the optimum level is obtained when the HF signal is input on EFMIN.
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