LC78681E Datasheet, PDF (16/23 Pages) Sanyo Semicon Device – Digital Signal Processor for Compact Disc Players

LC78681E
Q Subcode Output Circuit
(pin 50: WRQ, pin 51: RWC, pin 52: SQOUT, pin 54: CQCK, pin 56: M/L and pin 62: CS)
MSB
LSB
00001001
10001001
Command
ADDRESS FREE
ADDRESS 1
RES = low
Q subcode data can be read from the SQOUT pin by clocking the CQCK pin.
Of the 8-bit subcode data, the Q signal is effective for operations such as song access and display. WRQ is high only
when the block CRC is correct and the address in the Q subcode format is 1*.When the microprocessor senses that WRQ
is high and issues CQCK, data can be read from SQOUT in the sequence indicated below. When CQCK is activated, the
DSP disables internal register updating. When the microprocessor finishes reading data, it briefly sets RWC high to
reenable data updating and resets WRC low. CQCK should start to oscillate in the 11.2 ms period during which WRQ is
high. Data can be read in LSB-first format when M/L is low and in MSB-first format when it is high.
Note: * This condition is ignored when the Address Free command is issued. (The Address Free command is used in
CD-V applications.)
The order of data
output remains
unchanged whether
M/L is high or low.
LVM/PKM
16-bit data
M/L is high
M/L is low
CONT
ADR
TNO
INDEX (POINT)*
MIN
SEC
FLAME
ZERO
AMIN (PMIN)*/PKMIN
ASEC (PSEC)*/PKSEC
AFLAME (PFLAME)*/PKFLAME
LVM data/PKM data
LVM data/PKM data
Note: * Items in parentheses are for the disc lead-in area.
No. 4521-16/23