English
Language : 

LC89057W-VF4A-E Datasheet, PDF (56/59 Pages) Sanyo Semicon Device – Digital Audio Interface Transceiver
DO15
FSDAT7
LC89057W-VF4A-E
CCB address: 0xEB; Contents of Read register output
DO14
DO13
DO12
DO11
DO10
DO9
FSDAT6
FSDAT5
FSDAT4
FSDAT3
FSDAT2
FSDAT1
DO8
FSDAT0
FSDAT [7:0]
fs counter data output
• FSDAT [7:0] is the fs calculation counter value. The data length is 8 bits, FSDAT0 is LSB, and FSDAT7 is MSB.
• The relation between the count value and fs is expressed by the following equation.
fs = 6144/FSDAT (kHz)
• Since fs is calculated with 6.144MHz-clock, the calculation accuracy is subject to this clock.
• The calculation counter value is 8-bit output, so the fs capable of calculating is 24kHz or higher.
12.3.4 Read register 3 (readout of first 48 bits of channel status)
• The first 48 bits of channel status can be read with the demodulation function.
• The readout channel status data is output with LSB first.
• For readout, set the CCB address to 0xEC.
• The channel status data cannot be updated after the CCB address is set.
• The relation between the read registers and the channel status data is shown below.
Register
DO0
DO1
DO2
DO3
DO4
DO5
DO6
DO7
DO8
DO9
DO10
DO11
DO12
DO13
DO14
DO15
DO16
DO17
DO18
DO19
DO20
DO21
DO22
DO23
Bit No.
Bit 0
Bit 1
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
Bit 8
Bit 9
Bit 10
Bit 11
Bit 12
Bit 13
Bit 14
Bit 15
Bit 16
Bit 17
Bit 18
Bit 19
Bit 20
Bit 21
Bit 22
Bit 23
Table 12.7 Read Registers of First 48 bits of Channel Status
Contents
Register
Bit No.
Application
DO24
Bit 24
Control
DO25
Bit 25
DO26
Bit 26
DO27
Bit 27
DO28
Bit 28
DO29
Bit 29
Not defined
DO30
Bit 30
DO31
Bit 31
Category code
DO32
Bit 32
DO33
Bit 33
DO34
Bit 34
DO35
Bit 35
DO36
Bit 36
DO37
Bit 37
DO38
Bit 38
DO39
Bit 39
Source number
DO40
Bit 40
DO41
Bit 41
DO42
Bit 42
DO43
Bit 43
Channel number
DO44
Bit 44
DO45
Bit 45
DO46
Bit 46
DO47
Bit 47
Contents
Sampling frequency
Clock accuracy
Not defined
Word length
Not defined
No.7202-56/59