LC89057W-VF4A-E Datasheet, PDF (30/59 Pages) Sanyo Semicon Device – Digital Audio Interface Transceiver

LC89057W-VF4A-E
10.6.3 Channel status data output (CO)
• _{Possible to output channel status data from EMPHA/UO/CO by switching PBSEL1 that performs the setting of}
Preamble B synchronization signal output.
• _{Polarity of RLRCK is uncertain because channel status data loads data and outputs them on each sub-flame. However,}
the timing for a period of H output of preamble B synchronization signal PB and bit 0 data output (c0 Lch, c0 Rch) of
channel status is shown on the following figure.
RLRCK
RBCK
CO
c0 Lch
c0 Rch
c1 Lch
c1 Rch
c2 Lch
PB
Figure 10.15 Channel Status Data Output Timing
10.6.4 Preamble B synchronization signal output (PB)
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• Possible to output preambles B synchronization signal that is block synchronization of channel status from CKST/PB
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by switching the content of CKST/PB output by PBSEL [1:0].
• _{For the period that bit 0 data of the channel status is output, PB signal outputs H. For the otherwise period, it outputs L.}
• _{Regarding PBSEL [1:0], possible to output preamble B synchronization signal with DIT function. However,}
impossible to set output preamble B with DIR function and DIT function from PB at once because they share the
terminal.
• _{In case of setting preamble B synchronization signal output with DIR function, the channel status data is output from}
EMPHA/UO/CO pin, and the setting of UOSEL is invalid.
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