English
Language : 

LC87FBL08A Datasheet, PDF (4/28 Pages) Sanyo Semicon Device – 8K-byte FROM and 256-byte RAM integrated 8-bit 1-chip Microcontroller
LC87FBL08A
„Standby Function
• HALT mode: Halts instruction execution while allowing the peripheral circuits to continue operation.
1) Oscillation is not halted automatically.
2) There are three ways of resetting the HALT mode.
(1) Setting the reset pin to the low level
(2) System resetting by watchdog timer or low-voltage detection
(3) Occurrence of an interrupt
• HOLD mode: Suspends instruction execution and the operation of the peripheral circuits.
1) The CF, RC, and crystal oscillators automatically stop operation.
2) There are four ways of resetting the HOLD mode.
(1) Setting the reset pin to the lower level.
(2) System resetting by watchdog timer or low-voltage detection
(3) Having an interrupt source established at either INT0, INT1, INT2, INT4 or INT5
* INT0 and INT1 HOLD mode reset is available only when level detection is set.
(4) Having an interrupt source established at port 0.
• X'tal HOLD mode: Suspends instruction execution and the operation of the peripheral circuits except the base timer.
1) The RC oscillator automatically stop operation.
2) The state of crystal oscillation established when the X'tal HOLD mode is entered is retained.
3) There are five ways of resetting the X'tal HOLD mode.
(1) Setting the reset pin to the low level.
(2) System resetting by watchdog timer or low-voltage detection.
(3) Having an interrupt source established at either INT0, INT1, INT2, INT4 or INT5
* INT0 and INT1 HOLD mode reset is available only when level detection is set.
(4) Having an interrupt source established at port 0.
(5) Having an interrupt source established in the base timer circuit.
Note: Available only when X’tal oscillation is selected.
„Onchip Debugger
• Supports software debugging with the IC mounted on the target board.
• Software break point setting for debugger.
• Stepwise execution on debugger.
• Real time RAM data monitoring function on debugger.
All the RAM data map can be monitored on screen when the program is running.
(The RAM & SFR data can be changed by screen patch when the program is running)
• Two channels of on-chip debugger pins are available to be compatible with small pin count devices.
DBGP0 (P0), DBGP1 (P1)
„Data Security Function (flash versions only)
• Protects the program data stored in flash memory from unauthorized read or copy.
Note: This data security function does not necessarily provide absolute data security.
„Package Form
• QFP36(7×7) : Lead-/Halogen-free type
• VQLP32(4×4) : Lead-/Halogen-free type (build-to-order )
„Development Tools
• On-chip-debugger : (1) TCB87 TypeB + LC87FBL08A
(2) TCB87 TypeC (3 wire version) + LC87FBL08A
No.A1955-4/28