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LC87FBL08A Datasheet, PDF (21/28 Pages) Sanyo Semicon Device – 8K-byte FROM and 256-byte RAM integrated 8-bit 1-chip Microcontroller | |||
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LC87FBL08A
Continued from preceding page.
Parameter
Symbol
Normal mode
consumption
current
(Note 9-1)
(Note 9-2)
IDDOP(10)
IDDOP(11)
Pin/
Remarks
Conditions
VDD[V]
min
VDD1
⢠FsXâtal=32.768kHz crystal oscillation mode
⢠System clock set to 32.768kHz side
2.7 to 5.5
⢠Internal low speed and medium speed RC
oscillation stopped.
⢠Frequency variable RC oscillation stopped.
⢠1/2 frequency division ratio
2.7 to 3.6
⢠FsXâtal=32.768kHz crystal oscillation mode
⢠System clock set to 32.768kHz side
5.0
⢠Internal low speed and medium speed RC
oscillation stopped.
⢠Frequency variable RC oscillation stopped.
⢠1/2 frequency division ratio
3.3
⢠Ta=-10 to +50°C
Specification
typ
max
unit
28
89
11
38
μA
28
78
11
29
HALT mode
consumption
current
(Note 9-1)
(Note 9-2)
IDDHALT(1)
⢠HALT mode
⢠FmCF=12MHz ceramic oscillation mode
⢠System clock set to 12MHz side
⢠Internal low speed and medium speed RC
oscillation stopped.
⢠Frequency variable RC oscillation stopped.
⢠1/1 frequency division ratio
2.7 to 5.5
2.7 to 3.6
2.4
4.5
1.3
2.2
IDDHALT(2)
⢠HALT mode
⢠CF1=24MHz external clock
⢠System clock set to CF1 side
⢠Internal low speed and medium speed RC
oscillation stopped.
⢠Frequency variable RC oscillation stopped.
⢠1/2 frequency division ratio
3.0 to 5.5
3.0 to 3.6
2.7
5.3
1.6
2.9
IDDHALT(3)
⢠HALT mode
⢠FmCF=10MHz ceramic oscillation mode
⢠System clock set to 10MHz side
⢠Internal low speed and medium speed RC
oscillation stopped.
⢠Frequency variable RC oscillation stopped.
⢠1/1 frequency division ratio
2.7 to 5.5
2.7 to 3.6
2.0
4.1
1.1
2.1
IDDHALT(4)
⢠HALT mode
⢠FmCF=4MHz ceramic oscillation mode
⢠System clock set to 4MHz side
⢠Internal low speed and medium speed RC
oscillation stopped.
⢠Frequency variable RC oscillation stopped.
⢠1/1 frequency division ratio
2.7 to 5.5
2.7 to 3.6
mA
1.2
3.3
0.50
1.2
IDDHALT(5)
⢠HALT mode
⢠CF oscillation low amplifier size selected.
(CFLAMP=1)
⢠FmCF=4MHz ceramic oscillation mode
⢠System clock set to 4MHz side
⢠Internal low speed and medium speed RC
oscillation stopped.
⢠Frequency variable RC oscillation stopped.
⢠1/4 frequency division ratio
2.7 to 5.5
2.7 to 3.6
0.70
1.8
0.30
0.68
IDDHALT(6)
⢠HALT mode
⢠FsXâtal=32.768kHz crystal oscillation mode
⢠Internal low speed RC oscillation stopped.
2.7 to 5.5
0.30
0.90
⢠System clock set to internal medium speed
RC oscillation
⢠Frequency variable RC oscillation stopped.
2.7 to 3.6
0.20
0.44
⢠1/2 frequency division ratio
Note9-1: Values of the consumption current do not include current that flows into the output transistors and internal
pull-up resistors.
Note9-2: The consumption current values do not include operational current of LVD function if not specified.
Continued on next page.
No.A1955-21/28
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