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LC87FBL08A Datasheet, PDF (11/28 Pages) Sanyo Semicon Device – 8K-byte FROM and 256-byte RAM integrated 8-bit 1-chip Microcontroller
LC87FBL08A
Continued from preceding page.
Pin Name
I/O
Description
Port 7
P70 to P73
I/O
• 4-bit I/O port
• I/O specifiable in 1 bit units
• Pull-up resistors can be turned on and off in 1 bit units.
• Pin functions
P70: INT0 input / HOLD reset input / timer 0L capture input
P71: INT1 input / HOLD reset input / timer 0H capture input
P72: INT2 input / HOLD reset input / timer 0 event input / timer 0L capture input
P73: INT3 input (with noise filter) / timer 0 event input / timer 0H capture input
P70(AN8) to P73(AN11): AD converter input
Interrupt acknowledge types
Rising
Falling
Rising &
Falling
H level
INT0
INT1
INT2
enable
enable
enable
enable
enable
enable
disable
disable
enable
enable
enable
disable
INT3
enable
enable
enable
disable
L level
enable
enable
disable
disable
RES
CF1/XT1
CF2/XT2
I/O
External reset input / internal reset output
I
• Ceramic resonator or 32.768kHz crystal oscillator input pin
• Pin function
General-purpose input port
I/O
• Ceramic resonator or 32.768kHz crystal oscillator output pin
• Pin function
General-purpose I/O port
Option
No
No
No
No
Port Output Types
The table below lists the types of port outputs and the presence/absence of a pull-up resistor.
Data can be read into any input port even if it is in the output mode.
Port Name
P00 to P07
Option selected in
units of
1 bit
Option type
1
CMOS
Output type
Pull-up resistor
Programmable (Note 1)
2
Nch-open drain
No
P10 to P17
1 bit
1
CMOS
Programmable
2
Nch-open drain
Programmable
P20 to P21
1 bit
1
CMOS
Programmable
2
Nch-open drain
Programmable
P30 to P31
1 bit
1
CMOS
Programmable
2
Nch-open drain
Programmable
P70
-
No
Nch-open drain
Programmable
P71 to P73
-
No
CMOS
Programmable
CF2/XT2
-
No
Ceramic resonator/32.768kHz crystal resonator
No
output Nch-open drain
(N-channel open drain when set to general-purpose
output port)
Note 1: The control of the presence or absence of the programmable pull-up resistors for port 0 and the switching
between low-and high-impedance pull-up connection is exercised in nibble (4-bit) units (P00 to 03 or
P04 to 07).
No.A1955-11/28