LC87FBL08A Datasheet, PDF (20/28 Pages) Sanyo Semicon Device – 8K-byte FROM and 256-byte RAM integrated 8-bit 1-chip Microcontroller

LC87FBL08A
Consumption Current Characteristics at Ta = -40°C to +85°C, VSS1 = VSS2 = 0V
Parameter
Symbol
Normal mode
consumption
current
IDDOP(1)
Pin/
Remarks
VDD1
Conditions
• FmCF=12MHz ceramic oscillation mode
• System clock set to 12MHz side
• Internal low speed and medium speed RC
VDD[V]
min
2.7 to 5.5
Specification
typ
max
unit
4.8
8.7
(Note 9-1)
oscillation stopped.
(Note 9-2)
• Frequency variable RC oscillation stopped.
• 1/1 frequency division ratio
2.7 to 3.6
3.0
5.0
IDDOP(2)
• CF1=24MHz external clock
• System clock set to CF1 side
• Internal low speed and medium speed RC
3.0 to 5.5
5.0
9.6
oscillation stopped.
• Frequency variable RC oscillation stopped.
• 1/2 frequency division ratio
3.0 to 3.6
3.2
6.0
IDDOP(3)
• FmCF=10MHz ceramic oscillation mode
• System clock set to 10MHz side
2.7 to 5.5
4.1
7.8
• Internal low speed and medium speed RC
oscillation stopped.
• Frequency variable RC oscillation stopped.
• 1/1 frequency division ratio
2.7 to 3.6
2.6
4.9
IDDOP(4)
• FmCF=4MHz ceramic oscillation mode
• System clock set to 4MHz side
• Internal low speed and medium speed RC
2.7 to 5.5
2.2
5.1
oscillation stopped.
• Frequency variable RC oscillation stopped.
• 1/1 frequency division ratio
2.7 to 3.6
mA
1.5
2.7
IDDOP(5)
• CF oscillation low amplifier size selected.
(CFLAMP=1)
• FmCF=4MHz ceramic oscillation mode
2.7 to 5.5
0.95
2.4
• System clock set to 4MHz side
• Internal low speed and medium speed RC
oscillation stopped.
• Frequency variable RC oscillation stopped.
2.7 to 3.6
0.50
1.1
• 1/4 frequency division ratio
IDDOP(6)
• FsX’tal=32.768kHz crystal oscillation mode
• Internal low speed RC oscillation stopped.
2.7 to 5.5
0.42
1.4
• System clock set to internal medium speed
RC oscillation.
• Frequency variable RC oscillation stopped.
2.7 to 3.6
0.25
0.76
• 1/2 frequency division ratio
IDDOP(7)
• FsX’tal=32.768kHz crystal oscillation mode
• Internal low speed and medium speed RC
2.7 to 5.5
3.2
5.4
oscillation stopped.
• System clock set to 8MHz with
frequency variable RC oscillation
• 1/1 frequency division ratio
2.7 to 3.6
2.3
4.2
IDDOP(8)
• External FsX’tal and FmCF oscillation stopped.
• System clock set to internal low speed RC
2.7 to 5.5
55
169
oscillation.
• Internal medium speed RC oscillation sopped.
• Frequency variable RC oscillation stopped.
• 1/1 frequency division ratio
2.7 to 3.6
39
109
IDDOP(9)
• External FsX’tal and FmCF oscillation stopped.
μA
• System clock set to internal low speed RC
5.0
oscillation.
55
136
• Internal medium speed RC oscillation stopped.
• Frequency variable RC oscillation stopped.
• 1/1 frequency division ratio
3.3
39
103
• Ta=-10 to +50°C
Note9-1: Values of the consumption current do not include current that flows into the output transistors and internal
pull-up resistors.
Note9-2: The consumption current values do not include operational current of LVD function if not specified.
Continued on next page.
No.A1955-20/28