LC87FBL08A Datasheet, PDF (23/28 Pages) Sanyo Semicon Device – 8K-byte FROM and 256-byte RAM integrated 8-bit 1-chip Microcontroller

LC87FBL08A
F-ROM Programming Characteristics at Ta = +10°C to +55°C, VSS1 = VSS2 = 0V
Parameter
Onboard
programming
current
Programming
time
Symbol
IDDFW(1)
Pin/Remarks
VDD1
Conditions
• Only current of the Flash block.
tFW(1)
tFW(2)
• Erasing time
• Programming time
VDD[V]
min
2.7 to 5.5
2.7 to 5.5
Specification
typ
max
unit
5
10 mA
20
30 ms
40
60
μs
Characteristics of a Sample Main System Clock Oscillation Circuit
Given below are the characteristics of a sample main system clock oscillation circuit that are measured using a
SANYO-designated oscillation characteristics evaluation board and external components with circuit constant values
with which the oscillator vendor confirmed normal and stable oscillation.
Table 1 Characteristics of a Sample Main System Clock Oscillator Circuit with a Ceramic Oscillator
• CF oscillation normal amplifier size selected (CFLAMP=0)
„MURATA
Nominal
Frequency
Type
Oscillator Name
Circuit Constant
C1
C2
Rf
Rd
[pF] [pF]
[Ω]
[Ω]
Operating
Voltage
Range
[V]
Oscillation
Stabilization Time
typ
max
[ms]
[ms]
12MHz
SMD
CSTCE12M0G52-R0
(10) (10) Open 680
2.7 to 5.5
0.02
0.3
10MHz
SMD
LEAD
CSTCE10M0G52-R0
(10) (10) Open 680
2.7 to 5.5
0.02
0.3
CSTLS10M0G53-B0
(15) (15) Open 680
2.7 to 5.5
0.02
0.3
8MHz
SMD
LEAD
CSTCE8M00G52-R0
(10) (10) Open 1.0k
2.7 to 5.5
0.02
0.3
CSTLS8M00G53-B0
(15) (15) Open 1.0k
2.7 to 5.5
0.02
0.3
6MHz
SMD
LEAD
CSTCR6M00G53-R0
(15) (15) Open 1.5k
2.7 to 5.5
0.02
0.3
CSTLS6M00G53-B0
(15) (15) Open 1.5k
2.7 to 5.5
0.02
0.3
4MHz
SMD
LEAD
CSTCR4M00G53-R0
CSTLS4M00G53-B0
(15) (15) Open 1.5k
(15) (15) Open 1.5k
2.7 to 5.5
2.7 to 5.5
0.03
0.45
0.02
0.3
Remarks
Internal
C1, C2
• CF oscillation low amplifier size selected (CFLAMP=1)
„MURATA
Nominal
Frequency
Type
Oscillator Name
Circuit Constant
C1
C2
Rf
Rd
[pF]
[pF]
[Ω]
[Ω]
Operating
Voltage
Range
[V]
Oscillation
Stabilization Time
typ
max
[ms]
[ms]
Remarks
12MHz
SMD
CSTCE12M0G52-R0
(10) (10) Open 470
3.9 to 5.5
0.04
0.6
SMD
CSTCE10M0G52-R0
(10) (10) Open 470
2.9 to 5.5
0.03
0.45
10MHz
LEAD
CSTLS10M0G53-B0
(15) (15) Open 470
CSTLS10M0G53095-B0 (15) (15) Open 470
3.6 to 5.5
2.7 to 5.5
0.03
0.45
0.02
0.3
SMD
CSTCE8M00G52-R0
(10) (10) Open 680
2.7 to 5.5
0.03
0.45
8MHz
LEAD
CSTLS8M00G53-B0
(15) (15) Open 680
CSTLS8M00G53093-B0 (15) (15) Open 680
3.0 to 5.5
2.7 to 5.5
0.03
0.45
0.02
0.3
Internal
C1, C2
SMD
CSTCR6M00G53-R0
(15) (15) Open 1.0k
2.7 to 5.5
0.03
0.45
6MHz
LEAD
CSTLS6M00G53-B0
(15)
CSTLS6M00G53093-B0 (15)
(15) Open 1.0k
(15) Open 1.0k
2.8 to 5.5
2.7 to 5.5
0.03
0.45
0.02
0.3
4MHz
SMD
LEAD
CSTCR4M00G53-R0
(15) (15) Open 1.0k
2.7 to 5.5
0.04
0.6
CSTLS4M00G53-B0
(15) (15) Open 1.0k
2.7 to 5.5
0.02
0.3
The oscillation stabilization time refers to the time interval that is required for the oscillation to get stabilized in
follwing cases (see Figure 3).
• The time interval that is required for the oscillation to get stabilized after the instruction for starting the mainclock
oscillation circuit is executed.
• The time interval that is required for the oscillation to get stabilized after the HOLD mode is reset and oscillation is
started.
• The time interval that is required for the oscillation to get stabilized after the X’tal Hold mode, under the state which
the main clock oscillation is enabled, is reset and oscillation is started.
No.A1955-23/28