LC88F40H0PA Datasheet, PDF (31/32 Pages) Sanyo Semicon Device – For Car Audio Systems 16-bit ETR Microcontroller

LC88F40H0PA/H0PAU/F0PA/F0PAU/D0PA/D0PAU
Power VDDPORT
Power VDDCPU
RESB
*1
Reset time
tPIL(2)
VDDCPU
Operating VDD
lower limit
0V
Internal RC
oscillation
XT1, XT2
tms^X'tal
Operating
mode
Unpredictable
Reset
Initialization instruction
execution
User instruction execution
Figure 11 Reset Time and Oscillation Stabilization Time
*1: The voltage when the power is turned on and off must stand in the following relationship: VDDPORT ≥ VDDCPU.
It should be noted that, while the VDDPORT power is supplied, the I/O pin remains in an undefined state until the
VDDCPU voltage reaches the allowable operation range.
HOLD
release
No HOLD release signal HOLD release signal valid
Interrupt operation
Internal RC
oscillation
XT1, XT2
State
tms^X'tal
HOLD
HALT
Instruction execution
Figure 12 HOLD Release and Oscillation Stabilization Time
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