LC88F40H0PA Datasheet, PDF (28/32 Pages) Sanyo Semicon Device – For Car Audio Systems 16-bit ETR Microcontroller

LC88F40H0PA/H0PAU/F0PA/F0PAU/D0PA/D0PAU
Power Pin Treatment Condition 3 (VDDPLL, VSS4)
Connect capacitors that meet the following conditions between the VDDPLL and VSS4 pins:
• Connect among the VDDPLL and VSS4 pins and the capacitors C4 and C5 with the shortest possible lead wires,
of the same length (L4=L4’, L5=L5’) wherever possible.
• Connect a large-capacity capacitor C4 and a small-capacity capacitor C5 in parallel.
• The capacitance of C4 should be approximately 10μF.
• The capacitance of C5 should be approximately 0.1μF.
• The VDDPLL and VSS4 traces must be thicker than the other traces.
L5
L4
VDDPLL
C4
C5
L4’
L5’
VSS4
Figure 6
Power Pin Treatment Condition 4 (VREG, VSS1)
Connect capacitors that meet the following conditions between the VREG and VSS1 pins:
• Connect among the VREG and VSS1 pins and the capacitors C6 with the shortest possible lead wires,
of the same length (L6=L6’) wherever possible.
• The capacitance of C6 should be approximately 1μF.
• The VREG and VSS1 traces must be thicker than the other traces.
L6
VREG
C6
VSS1
L6’
Figure 7
No.A1853-28/32